Setting PCSTimeout interrupt source was copied from the vendor driver
which uses the chip programmable timer interrupt. The mainline driver
doesn't use this timer interrupt.

SYSErr indicates a PCI error and isn't defined on the PCIe models.

Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com>
---
 drivers/net/ethernet/realtek/r8169.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/realtek/r8169.c 
b/drivers/net/ethernet/realtek/r8169.c
index fa6349b5d..9e04566a2 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -5389,7 +5389,7 @@ static void rtl_hw_start_8168(struct rtl8169_private *tp)
 
        /* Work around for RxFIFO overflow. */
        if (tp->mac_version == RTL_GIGA_MAC_VER_11) {
-               tp->event_slow |= RxFIFOOver | PCSTimeout;
+               tp->event_slow |= RxFIFOOver;
                tp->event_slow &= ~RxOverflow;
        }
 
@@ -7027,15 +7027,14 @@ static const struct rtl_cfg_info {
        },
        [RTL_CFG_1] = {
                .hw_start       = rtl_hw_start_8168,
-               .event_slow     = SYSErr | LinkChg | RxOverflow,
+               .event_slow     = LinkChg | RxOverflow,
                .has_gmii       = 1,
                .coalesce_info  = rtl_coalesce_info_8168_8136,
                .default_ver    = RTL_GIGA_MAC_VER_11,
        },
        [RTL_CFG_2] = {
                .hw_start       = rtl_hw_start_8101,
-               .event_slow     = SYSErr | LinkChg | RxOverflow | RxFIFOOver |
-                                 PCSTimeout,
+               .event_slow     = LinkChg | RxOverflow | RxFIFOOver,
                .coalesce_info  = rtl_coalesce_info_8168_8136,
                .default_ver    = RTL_GIGA_MAC_VER_13,
        }
-- 
2.19.1


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