Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-21 Thread Benjamin Herrenschmidt
On Wed, 2016-09-21 at 18:48 +0930, Joel Stanley wrote: > > What line is it out of the PHY ? The PHY IRQ ? If yes then it's meant > > to be telling you to go look at the PHY registers for a link status > > change, but only works if the PHY has also been configured > > appropriately... > > Yep, PHY

Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-21 Thread Joel Stanley
On Wed, Sep 21, 2016 at 6:33 PM, Benjamin Herrenschmidt wrote: > On Wed, 2016-09-21 at 11:32 +0930, Joel Stanley wrote: >> I had a look at the eval board schematic and it appears that the line >> has pull down resistors on it, explaining why the IRQ fires when it's >>

Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-21 Thread Benjamin Herrenschmidt
On Wed, 2016-09-21 at 11:32 +0930, Joel Stanley wrote: > I had a look at the eval board schematic and it appears that the line > has pull down resistors on it, explaining why the IRQ fires when it's > configured to active low. Other machines re-use the pin pin as a GPIO. > So yes, I will change

Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-20 Thread Joel Stanley
On Wed, Sep 21, 2016 at 12:59 AM, Andrew Lunn wrote: > On Tue, Sep 20, 2016 at 10:13:14PM +1000, Benjamin Herrenschmidt wrote: >> On Tue, 2016-09-20 at 16:00 +0930, Joel Stanley wrote: >> > On Aspeed SoC with a direct PHY connection (non-NSCI), we receive >> > continual PHYSTS

Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-20 Thread Andrew Lunn
On Tue, Sep 20, 2016 at 10:13:14PM +1000, Benjamin Herrenschmidt wrote: > On Tue, 2016-09-20 at 16:00 +0930, Joel Stanley wrote: > > On Aspeed SoC with a direct PHY connection (non-NSCI), we receive > > continual PHYSTS interrupts: > > > >  [   20.28] ftgmac100 1e66.ethernet eth0: [ISR] =

Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-20 Thread Sergei Shtylyov
Hello. On 9/20/2016 9:30 AM, Joel Stanley wrote: On Aspeed SoC with a direct PHY connection (non-NSCI), we receive continual PHYSTS interrupts: [ 20.28] ftgmac100 1e66.ethernet eth0: [ISR] = 0x200: PHYSTS_CHG [ 20.28] ftgmac100 1e66.ethernet eth0: [ISR] = 0x200:

Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-20 Thread Benjamin Herrenschmidt
On Tue, 2016-09-20 at 16:00 +0930, Joel Stanley wrote: > On Aspeed SoC with a direct PHY connection (non-NSCI), we receive > continual PHYSTS interrupts: > >  [   20.28] ftgmac100 1e66.ethernet eth0: [ISR] = 0x200: PHYSTS_CHG >  [   20.28] ftgmac100 1e66.ethernet eth0: [ISR] =

[PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

2016-09-20 Thread Joel Stanley
On Aspeed SoC with a direct PHY connection (non-NSCI), we receive continual PHYSTS interrupts: [ 20.28] ftgmac100 1e66.ethernet eth0: [ISR] = 0x200: PHYSTS_CHG [ 20.28] ftgmac100 1e66.ethernet eth0: [ISR] = 0x200: PHYSTS_CHG [ 20.28] ftgmac100 1e66.ethernet eth0: