Re: [PATCH net-next v2 0/3] net: dsa: mv88e6xxx: isolate Global2 support

2016-09-06 Thread David Miller
From: Vivien Didelot Date: Fri, 2 Sep 2016 14:45:31 -0400 > Registers of Marvell chips are organized in internal SMI devices. > > One of them at address 0x1C is called Global2. It provides an extended > set of registers, used for interrupt control, EEPROM

[PATCH net-next v2 0/3] net: dsa: mv88e6xxx: isolate Global2 support

2016-09-02 Thread Vivien Didelot
Registers of Marvell chips are organized in internal SMI devices. One of them at address 0x1C is called Global2. It provides an extended set of registers, used for interrupt control, EEPROM access, indirect PHY access (to bypass the PHY Polling Unit) and cross-chip setup. Most chips have it, but