On Fri, Jul 31, 2015 at 12:22:04AM -0700, David Miller wrote:
From: Nathan Sullivan nathan.sulli...@ni.com
Date: Thu, 30 Jul 2015 18:09:05 -0500
On Thu, Jul 30, 2015 at 10:00:34AM -0700, David Miller wrote:
From: Nathan Sullivan nathan.sulli...@ni.com
Date: Thu, 30 Jul 2015 10:15:48
From: Nathan Sullivan nathan.sulli...@ni.com
Date: Fri, 31 Jul 2015 09:27:06 -0500
I believe I found the issue, we are using this PHY with cadence macb as
the MAC. The driver currently turns off the management port in
macb_reset_hw, which we have stopped with a local change since our hardware
From: Nathan Sullivan nathan.sulli...@ni.com
Date: Thu, 30 Jul 2015 18:09:05 -0500
On Thu, Jul 30, 2015 at 10:00:34AM -0700, David Miller wrote:
From: Nathan Sullivan nathan.sulli...@ni.com
Date: Thu, 30 Jul 2015 10:15:48 -0500
Changes for V2: Actually make sure it compiles this time.
The ksz9031 has a behavior where it will clear the interrupt enable bits
when leaving power down. To work around this, make sure the interrupt
bits are in the state they are expected to be when resuming.
Signed-off-by: Nathan Sullivan nathan.sulli...@ni.com
---
Changes for V2: Actually make
On Thu, Jul 30, 2015 at 10:00:34AM -0700, David Miller wrote:
From: Nathan Sullivan nathan.sulli...@ni.com
Date: Thu, 30 Jul 2015 10:15:48 -0500
Changes for V2: Actually make sure it compiles this time.
If V1 didn't compile, even for you, then I have a big problem.
And that problem is
On 30/07/15 08:15, Nathan Sullivan wrote:
The ksz9031 has a behavior where it will clear the interrupt enable bits
when leaving power down. To work around this, make sure the interrupt
bits are in the state they are expected to be when resuming.
Signed-off-by: Nathan Sullivan
From: Nathan Sullivan nathan.sulli...@ni.com
Date: Thu, 30 Jul 2015 10:15:48 -0500
Changes for V2: Actually make sure it compiles this time.
If V1 didn't compile, even for you, then I have a big problem.
And that problem is that you didn't test this change at all.
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On 07/30/2015 06:15 PM, Nathan Sullivan wrote:
The ksz9031 has a behavior where it will clear the interrupt enable bits
when leaving power down. To work around this, make sure the interrupt
bits are in the state they are expected to be when resuming.
Signed-off-by: Nathan Sullivan