On Thu, 2017-01-19 at 12:55 +0200, Roman Yeryomin wrote:
> On 17 January 2017 at 21:20, Eric Dumazet wrote:
> > Note that at 100M, 64 rx descriptors have a 8 ms max latency.
> >
> > Switching to 256 also multiply by 4 the latency -> 32 ms latency.
> >
> > Presumably
On 17 January 2017 at 21:20, Eric Dumazet wrote:
> On Tue, 2017-01-17 at 20:27 +0200, Roman Yeryomin wrote:
>> On 17 January 2017 at 19:58, David Miller wrote:
>> > From: Roman Yeryomin
>> > Date: Tue, 17 Jan 2017 19:32:36
On Tue, 2017-01-17 at 20:27 +0200, Roman Yeryomin wrote:
> On 17 January 2017 at 19:58, David Miller wrote:
> > From: Roman Yeryomin
> > Date: Tue, 17 Jan 2017 19:32:36 +0200
> >
> >> Having larger ring sizes almost eliminates rx fifo overflow, thus
>
From: Roman Yeryomin
Date: Tue, 17 Jan 2017 20:27:57 +0200
> On 17 January 2017 at 19:58, David Miller wrote:
>> From: Roman Yeryomin
>> Date: Tue, 17 Jan 2017 19:32:36 +0200
>>
>>> Having larger ring sizes almost eliminates rx
On 17 January 2017 at 19:58, David Miller wrote:
> From: Roman Yeryomin
> Date: Tue, 17 Jan 2017 19:32:36 +0200
>
>> Having larger ring sizes almost eliminates rx fifo overflow, thus improving
>> performance.
>> This patch reduces rx overflow
From: Roman Yeryomin
Date: Tue, 17 Jan 2017 19:32:36 +0200
> Having larger ring sizes almost eliminates rx fifo overflow, thus improving
> performance.
> This patch reduces rx overflow occurence by approximately 1000 times (from
> ~25k down to ~25 times per 3M frames)
Having larger ring sizes almost eliminates rx fifo overflow, thus improving
performance.
This patch reduces rx overflow occurence by approximately 1000 times (from ~25k
down to ~25 times per 3M frames)
Signed-off-by: Roman Yeryomin
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drivers/net/ethernet/korina.c | 4 ++--
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