Re: macb napi strange behavior

2015-06-17 Thread Jaeden Amero
On 06/17/2015 11:09 AM, Nicolae Rosia wrote: I'm trying to determine why I have a huge number of IRQs for only a macb interface and the other one works just fine (low IRQ activity). I have activated IP forward and I'm just forwarding packets from eth0 to eth1. The platform is Zynq7, Linux

[PATCH 2/2] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
– Device Address 0h, Register 3h Write Register 0h, Bit [9] = 1 // Restart Auto-Negotiation Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/micrel.c b

[PATCH 1/2] net/phy: micrel: Comment MMD address of extended registers

2015-06-05 Thread Jaeden Amero
There are some defines for a few pad skew related extended registers. Specify for which MMD Address (dev_addr) they are for. Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy

[PATCH v2 1/3] net/phy: micrel: Be more const correct

2015-06-05 Thread Jaeden Amero
In a few places in this driver, we weren't using const where we could have. Use const more. In addition, change the arrays of strings in ksz9031_config_init() to be not only const, but also static. Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 29

[PATCH v2 0/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
In v2, we add an additional cleanup commit to make an array of strings static const and to improve const correctness generally. We also no longer unnecessarily initialize the result variable in ksz9031_center_flp_timing(). Jaeden Amero (3): net/phy: micrel: Be more const correct net/phy

[PATCH v2 3/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
– Device Address 0h, Register 3h Write Register 0h, Bit [9] = 1 // Restart Auto-Negotiation Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/micrel.c b

[PATCH v2 2/3] net/phy: micrel: Comment MMD address of extended registers

2015-06-05 Thread Jaeden Amero
There are some defines for a few pad skew related extended registers. Specify for which MMD Address (dev_addr) they are for. Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy

Re: [PATCH 2/2] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
Please disregard this patch set. I'll post a second version. Cheers, Jaeden -- To unsubscribe from this list: send the line unsubscribe netdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH v3 0/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
() introduced by a previous version of net/phy: micrel: Center FLP timing at 16ms. Jaeden Amero (3): net/phy: micrel: Be more const correct net/phy: micrel: Comment MMD address of extended registers net/phy: micrel: Center FLP timing at 16ms drivers/net/phy/micrel.c | 53

[PATCH v3 1/3] net/phy: micrel: Be more const correct

2015-06-05 Thread Jaeden Amero
In a few places in this driver, we weren't using const where we could have. Use const more. In addition, change the arrays of strings in ksz9031_config_init() to be not only const, but also static. Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 29

[PATCH v3 3/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
– Device Address 0h, Register 3h Write Register 0h, Bit [9] = 1 // Restart Auto-Negotiation Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 23 ++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/micrel.c b/drivers

[PATCH v3 2/3] net/phy: micrel: Comment MMD address of extended registers

2015-06-05 Thread Jaeden Amero
There are some defines for a few pad skew related extended registers. Specify for which MMD Address (dev_addr) they are for. Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy

[PATCH v4 3/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 23 ++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index f23765e..499185e 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy

[PATCH v4 1/3] net/phy: micrel: Be more const correct

2015-06-05 Thread Jaeden Amero
In a few places in this driver, we weren't using const where we could have. Use const more. In addition, change the arrays of strings in ksz9031_config_init() to be not only const, but also static. Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 29

[PATCH v4 2/3] net/phy: micrel: Comment MMD address of extended registers

2015-06-05 Thread Jaeden Amero
There are some defines for a few pad skew related extended registers. Specify for which MMD Address (dev_addr) they are for. Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- drivers/net/phy/micrel.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy

[PATCH v4 0/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
registers and restart auto-negotiation where we do (config_init). Jaeden Amero (3): net/phy: micrel: Be more const correct net/phy: micrel: Comment MMD address of extended registers net/phy: micrel: Center FLP timing at 16ms drivers/net/phy/micrel.c | 53

Re: [PATCH v3 3/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
On 06/05/2015 05:43 PM, Florian Fainelli wrote: On 05/06/15 15:40, Jaeden Amero wrote: Link failures have been observed when using the KSZ9031 with HP 1810-8G and HP 1910-8G network switches. Center the FLP timing at 16ms to help avoid intermittent link failures. From the KSZ9031RNX

Re: [PATCH v2 3/3] net/phy: micrel: Center FLP timing at 16ms

2015-06-05 Thread Jaeden Amero
On 06/05/2015 04:09 PM, Sergei Shtylyov wrote: @@ -441,6 +461,7 @@ static int ksz9031_config_init(struct phy_device *phydev) txd2-skew-ps, txd3-skew-ps }; static const char *control_skews[2] = {txen-skew-ps, rxdv-skew-ps}; +int result; You hardly need this

Re: [PATCH RFC] net/macb: Fix UDPv4 checksum offload

2015-04-28 Thread Jaeden Amero
On 04/27/2015 09:47 PM, David Miller wrote: From: Jaeden Amero jaeden.am...@ni.com Date: Mon, 27 Apr 2015 17:43:30 -0500 A UDP checksum of zero, means checksum not computed. And your device isn't computing the checksum at all, but rather is leaving it at zero. The zero checksum is not what

[PATCH RFC] net/macb: Fix UDPv4 checksum offload

2015-04-27 Thread Jaeden Amero
). If we set the checksum field in the UDP header to 0, the checksum is computed correctly. Signed-off-by: Jeff Westfahl jeff.westf...@ni.com Signed-off-by: Mihai Neagu mihai.ne...@ni.com Signed-off-by: Jaeden Amero jaeden.am...@ni.com --- Hey Nicolas, We see this bug on the Zynq 7000 series chips