On 07/01/2015 04:44 PM, Eric Dumazet wrote:
I really doubt this adapter can process millions of packets per second ?
I was suggesting this since I was taking into consideration the comment
from skbuff.c, we can save several CPU cycles by avoiding having to
disable and re-enable IRQs.
Is there
On 07/01/2015 01:56 PM, Eric Dumazet wrote:
Then please use netdev_alloc_skb_ip_align(), so that you get rid of
skb_reserve()
Thank you for the suggestion.
I can do that.
A related question, should I also replace netdev_alloc with
napi_alloc_skb in places where I have a napi struct?
--
To
Hello,
After reading the GEM part of Zynq7000 Technical Reference Manual [0], I
think that SG should be supported.
Is there a reason why SG is disabled in macb for Zynq?
Best regards,
Nicolae Rosia
--
To unsubscribe from this list: send the line unsubscribe netdev in
the body of a message
On Wed, Jul 1, 2015 at 6:33 PM, Eric Dumazet eric.duma...@gmail.com wrote:
[...]
This only matters in terms of few nano seconds per packet, so for 10Gb+
NIC anyway. Absolute noise for most NIC.
I'll give it a try and benchmark.
I achieved a huge speedup by moving TX into napi [0], but my
Signed-off-by: Nicolae Rosia nicolae.ro...@certsign.ro
---
drivers/net/ethernet/cadence/macb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index caeb395..dbb5160 100644
--- a/drivers/net
Hi,
I gave it a shot. Can you please take a look?
I don't know how to deal with multiple queues since Zynq 7000 has one
queue per interface.
I get a performance improvement of over 110 Mbps in IP forwarding (680
Mbps vs 570 Mbps) and a massive reduction of interrupts.
Patch below.
From: Nicolae
On Sat, Jun 20, 2015 at 7:43 PM, Francois Romieu rom...@fr.zoreil.com wrote:
Florian Fainelli f.faine...@gmail.com :
[...]
Typically, NAPI is used at the receive side of the Ethernet NIC/driver
to lower the hard/soft interrupt context switch, although there is
nothing that prevent you to
Hi,
On Wed, Jun 17, 2015 at 9:54 PM, Jaeden Amero jaeden.am...@ni.com wrote:
On 06/17/2015 11:09 AM, Nicolae Rosia wrote:
The times we've seen tons of interrupts on Ethernet with interrupts
routed through the PL was when the FPGA was unprogrammed (or in the
process of being reprogrammed
/interrupts:
[...]
144: 679425 0 GIC 54 eth0
145: 17867097 0 GIC 77 eth1
[...]
Any ideas?
Best regards,
Nicolae Rosia
--
To unsubscribe from this list: send the line unsubscribe netdev in
the body of a message to majord...@vger.kernel.org
More majordomo info at http
