Re: [PATCH v10 3/5] PCI: Disable Relaxed Ordering Attributes for AMD A1100

2017-08-14 Thread Raj, Ashok
lexander.h.du...@intel.com> > Acked-by: Ashok Raj <ashok@intel.com> I can't ack this patch :-).. must be someone from AMD. Please remove my signature from this. > --- > drivers/pci/quirks.c | 16 > 1 file changed, 16 insertions(+) > > diff --gi

Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING

2017-08-09 Thread Raj, Ashok
On Wed, Aug 09, 2017 at 04:46:07PM +, Casey Leedom wrote: > | From: Raj, Ashok <ashok@intel.com> > | Sent: Wednesday, August 9, 2017 8:58 AM > | ... > | As Casey pointed out in an earlier thread, we choose the heavy hammer > | approach because there are some

Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING

2017-08-09 Thread Raj, Ashok
Hi Bjorn On Tue, Aug 08, 2017 at 06:22:00PM -0500, Bjorn Helgaas wrote: > On Sat, Aug 05, 2017 at 03:15:10PM +0800, Ding Tianhong wrote: > > From: Casey Leedom > > > > Root complexes don't obey PCIe 3.0 ordering rules, hence could lead to > > data-corruption. > > This needs

Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

2017-08-04 Thread Raj, Ashok
On Fri, Aug 04, 2017 at 08:20:37PM +, Casey Leedom wrote: > | From: Raj, Ashok <ashok@intel.com> > | Sent: Thursday, August 3, 2017 1:31 AM > | > | I don't understand this completely.. So your driver would know not to send > | RO TLP's to root complex. But you want t

Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

2017-08-03 Thread Raj, Ashok
Hi Ding patch looks good, except would reword the patch description for clarity here is my crack at it, feel free to use. On Thu, Jul 13, 2017 at 10:21:31PM +0800, Ding Tianhong wrote: > The PCIe Device Control Register use the bit 4 to indicate that > whether the device is permitted to enable

Re: [PATCH v7 1/3] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING

2017-08-03 Thread Raj, Ashok
Hi Ding Not sure if V7 is the last version. can you consider rewording this just to make it a little bit more readable? My suggestion below, feel free to use/modify Otherwise its all good and you can add my Ack. Acked-by: Ashok Raj <ashok@intel.com> On Thu, Jul 13, 2017 at 10:2

Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

2017-08-03 Thread Raj, Ashok
Hi Casey On Wed, Aug 02, 2017 at 05:53:52PM +, Casey Leedom wrote: >   Okay, here you go.  As you can tell, it's almost a trivial copy of the > cxgb4 patch. >   >   By the way, I realized that we have yet another hole which is likely not > to be fixable.  If we're dealing with a problematic

Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

2017-07-27 Thread Raj, Ashok
Hi Casey > | Still no Intel and AMD guys has ack this, this is what I am worried about, > | should I ping some man again ? I can ack the patch set for Intel specific changes. Now that the doc is made public :-). Can you/Ding resend the patch series, i do have the most recent v7, some of the

Re: [PATCH 1/2] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING

2017-05-02 Thread Raj, Ashok
On Tue, May 02, 2017 at 11:10:22AM -0700, Alexander Duyck wrote: > On Tue, May 2, 2017 at 9:53 AM, Raj, Ashok <ashok@intel.com> wrote: > > On Tue, May 02, 2017 at 09:39:34AM -0700, Alexander Duyck wrote: > >> On Mon, May 1, 2017 at 4:13 PM, Casey Leedom &l

Re: [PATCH 1/2] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING

2017-05-02 Thread Raj, Ashok
On Tue, May 02, 2017 at 09:39:34AM -0700, Alexander Duyck wrote: > On Mon, May 1, 2017 at 4:13 PM, Casey Leedom wrote: > > The new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING indicates that the Relaxed > > Ordering Attribute should not be used on Transaction Layer Packets destined

Re: [PATCH 1/2] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING

2017-05-02 Thread Raj, Ashok
Hi Casey On Mon, May 01, 2017 at 04:13:50PM -0700, Casey Leedom wrote: > The new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING indicates that the Relaxed > Ordering Attribute should not be used on Transaction Layer Packets destined > for the PCIe End Node so flagged. Initially flagged this way are