Re: [PATCH net-next] net: dsa: bcm_sf2: Unhardcode port numbers

[David Miller]

From: Florian Fainelli 
Date: Fri, 23 Oct 2015 12:11:08 -0700

> While the current driver mostly supports BCM7445 which has a hardcoded
> location for its MoCA port on port 7 and port 0 for its internal PHY,
> this is not necessarily true for all other chips out there such as
> BCM3390 for instance.
> 
> Walk the list of ports from Device Tree, get their port number ("reg"
> property), and then parse the "phy-mode" property and initialize two
> internal variables: moca_port and a bitmask of internal PHYs. Since we
> use interrupts for the MoCA port, we introduce two helper functions to
> enable/disable interrupts and do this at the appropriate bank (INTRL2_0
> or INTRL2_1).
> 
> Signed-off-by: Florian Fainelli 

Applied.
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[PATCH net-next] net: dsa: bcm_sf2: Unhardcode port numbers

[Florian Fainelli]

While the current driver mostly supports BCM7445 which has a hardcoded
location for its MoCA port on port 7 and port 0 for its internal PHY,
this is not necessarily true for all other chips out there such as
BCM3390 for instance.

Walk the list of ports from Device Tree, get their port number ("reg"
property), and then parse the "phy-mode" property and initialize two
internal variables: moca_port and a bitmask of internal PHYs. Since we
use interrupts for the MoCA port, we introduce two helper functions to
enable/disable interrupts and do this at the appropriate bank (INTRL2_0
or INTRL2_1).

Signed-off-by: Florian Fainelli 
---
 drivers/net/dsa/bcm_sf2.c | 102 +-
 drivers/net/dsa/bcm_sf2.h |   6 +++
 2 files changed, 97 insertions(+), 11 deletions(-)

diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index 9d56515f4c4d..0a284e204644 100644
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -264,6 +265,50 @@ static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, 
bool enable)
}
 }
 
+static inline void bcm_sf2_port_intr_enable(struct bcm_sf2_priv *priv,
+   int port)
+{
+   unsigned int off;
+
+   switch (port) {
+   case 7:
+   off = P7_IRQ_OFF;
+   break;
+   case 0:
+   /* Port 0 interrupts are located on the first bank */
+   intrl2_0_mask_clear(priv, P_IRQ_MASK(P0_IRQ_OFF));
+   return;
+   default:
+   off = P_IRQ_OFF(port);
+   break;
+   }
+
+   intrl2_1_mask_clear(priv, P_IRQ_MASK(off));
+}
+
+static inline void bcm_sf2_port_intr_disable(struct bcm_sf2_priv *priv,
+int port)
+{
+   unsigned int off;
+
+   switch (port) {
+   case 7:
+   off = P7_IRQ_OFF;
+   break;
+   case 0:
+   /* Port 0 interrupts are located on the first bank */
+   intrl2_0_mask_set(priv, P_IRQ_MASK(P0_IRQ_OFF));
+   intrl2_0_writel(priv, P_IRQ_MASK(P0_IRQ_OFF), INTRL2_CPU_CLEAR);
+   return;
+   default:
+   off = P_IRQ_OFF(port);
+   break;
+   }
+
+   intrl2_1_mask_set(priv, P_IRQ_MASK(off));
+   intrl2_1_writel(priv, P_IRQ_MASK(off), INTRL2_CPU_CLEAR);
+}
+
 static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,
  struct phy_device *phy)
 {
@@ -280,7 +325,7 @@ static int bcm_sf2_port_setup(struct dsa_switch *ds, int 
port,
core_writel(priv, 0, CORE_G_PCTL_PORT(port));
 
/* Re-enable the GPHY and re-apply workarounds */
-   if (port == 0 && priv->hw_params.num_gphy == 1) {
+   if (priv->int_phy_mask & 1 << port && priv->hw_params.num_gphy == 1) {
bcm_sf2_gphy_enable_set(ds, true);
if (phy) {
/* if phy_stop() has been called before, phy
@@ -297,9 +342,9 @@ static int bcm_sf2_port_setup(struct dsa_switch *ds, int 
port,
}
}
 
-   /* Enable port 7 interrupts to get notified */
-   if (port == 7)
-   intrl2_1_mask_clear(priv, P_IRQ_MASK(P7_IRQ_OFF));
+   /* Enable MoCA port interrupts to get notified */
+   if (port == priv->moca_port)
+   bcm_sf2_port_intr_enable(priv, port);
 
/* Set this port, and only this one to be in the default VLAN,
 * if member of a bridge, restore its membership prior to
@@ -329,12 +374,10 @@ static void bcm_sf2_port_disable(struct dsa_switch *ds, 
int port,
if (priv->wol_ports_mask & (1 << port))
return;
 
-   if (port == 7) {
-   intrl2_1_mask_set(priv, P_IRQ_MASK(P7_IRQ_OFF));
-   intrl2_1_writel(priv, P_IRQ_MASK(P7_IRQ_OFF), INTRL2_CPU_CLEAR);
-   }
+   if (port == priv->moca_port)
+   bcm_sf2_port_intr_disable(priv, port);
 
-   if (port == 0 && priv->hw_params.num_gphy == 1)
+   if (priv->int_phy_mask & 1 << port && priv->hw_params.num_gphy == 1)
bcm_sf2_gphy_enable_set(ds, false);
 
if (dsa_is_cpu_port(ds, port))
@@ -615,6 +658,42 @@ static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv)
intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
 }
 
+static void bcm_sf2_identify_ports(struct bcm_sf2_priv *priv,
+  struct device_node *dn)
+{
+   struct device_node *port;
+   const char *phy_mode_str;
+   int mode;
+   unsigned int port_num;
+   int ret;
+
+   priv->moca_port = -1;
+
+   for_each_available_child_of_node(dn, port) {
+   if (of_property_read_u32(port, "reg", _num))
+   continue;
+
+   /* Internal PHYs get assigned a specific 'phy-mode' property
+