Re: [PATCH 6/7] e1000: eliminate duplicate barriers on weakly-ordered archs

2018-03-15 Thread Sinan Kaya
On 3/15/2018 8:25 PM, Alexander Duyck wrote: > On Thu, Mar 15, 2018 at 4:30 PM, Sinan Kaya wrote: >> On 3/14/2018 9:41 PM, Alexander Duyck wrote: } >>> So you missed the writel in e1000_xmit_frame. You should probably get >>> that one too while you are doing these

Re: [PATCH 6/7] e1000: eliminate duplicate barriers on weakly-ordered archs

2018-03-15 Thread Alexander Duyck
On Thu, Mar 15, 2018 at 4:30 PM, Sinan Kaya wrote: > On 3/14/2018 9:41 PM, Alexander Duyck wrote: >>> } >>> >> So you missed the writel in e1000_xmit_frame. You should probably get >> that one too while you are doing these updates. The wmb() is in >> e1000_tx_queue(). >> >

Re: [PATCH 6/7] e1000: eliminate duplicate barriers on weakly-ordered archs

2018-03-15 Thread Sinan Kaya
On 3/14/2018 9:41 PM, Alexander Duyck wrote: >> } >> > So you missed the writel in e1000_xmit_frame. You should probably get > that one too while you are doing these updates. The wmb() is in > e1000_tx_queue(). > I brought wmb() outside along with the next descriptor assignment to be similar to

Re: [PATCH 6/7] e1000: eliminate duplicate barriers on weakly-ordered archs

2018-03-14 Thread Alexander Duyck
On Tue, Mar 13, 2018 at 8:20 PM, Sinan Kaya wrote: > Code includes wmb() followed by writel(). writel() already has a barrier > on some architectures like arm64. > > This ends up CPU observing two barriers back to back before executing the > register write. > > Since code

[PATCH 6/7] e1000: eliminate duplicate barriers on weakly-ordered archs

2018-03-13 Thread Sinan Kaya
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed().