On Mon, Jul 18, 2016 at 08:45:39PM -0400, Vivien Didelot wrote:
> All Marvell switch chips from (88E6060 to 88E6390) have a ATU Control
> register containing bits 11:4 to configure an ATU Age Time quotient.
>
> However the coefficient used to calculate the ATU Age Time vary with the
> models.
> Hi Vivien
>
> This is doing a read/modify/write, so should really hold the mutex.
Upps. The mutex is held. Sorry for the noise.
Andrew
> +static int mv88e6xxx_g1_set_age_time(struct mv88e6xxx_chip *chip,
> + unsigned int msecs)
> +{
> + const unsigned int coeff = chip->info->age_time_coeff;
> + const unsigned int min = 0x01 * coeff;
> + const unsigned int max = 0xff * coeff;
> + u8
All Marvell switch chips from (88E6060 to 88E6390) have a ATU Control
register containing bits 11:4 to configure an ATU Age Time quotient.
However the coefficient used to calculate the ATU Age Time vary with the
models. E.g. 88E6060, 88E6352 and 88E6390 use respectively 16, 15 and
3.75 seconds.
