Re: [Intel-wired-lan] [PATCH v3 09/18] fm10k: Eliminate duplicate barriers on weakly-ordered archs

On 3/16/2018 12:30 PM, Alexander Duyck wrote: > On Fri, Mar 16, 2018 at 9:16 AM, Sinan Kaya wrote: >> Code includes wmb() followed by writel(). writel() already has a >> barrier on some architectures like arm64. >> >> This ends up CPU observing two barriers back to back

Re: [Intel-wired-lan] [PATCH v3 09/18] fm10k: Eliminate duplicate barriers on weakly-ordered archs

On Fri, Mar 16, 2018 at 9:16 AM, Sinan Kaya wrote: > Code includes wmb() followed by writel(). writel() already has a > barrier on some architectures like arm64. > > This ends up CPU observing two barriers back to back before executing > the register write. > > Since code

[PATCH v3 09/18] fm10k: Eliminate duplicate barriers on weakly-ordered archs

Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed().