Re: [PATCH v3 10/11] ARM64: dts: rockchip: Add gmac2phy node support for rk3328

2017-08-02 Thread Florian Fainelli 
On 08/01/2017 11:24 PM, David Wu wrote:
> The gmac2phy controller of rk3328 is connected to internal phy
> directly inside, add the node for the internal phy support.
> 
> Signed-off-by: David Wu 
> ---
>  arch/arm64/boot/dts/rockchip/rk3328.dtsi | 25 +
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 0be96ce..51c8c66 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -63,6 +63,8 @@
>   i2c1 = 
>   i2c2 = 
>   i2c3 = 
> + ethernet0 = 
> + ethernet1 = 
>   };
>  
>   cpus {
> @@ -424,6 +426,29 @@
>   status = "disabled";
>   };
>  
> + gmac2phy: eth@ff55 {
> + compatible = "rockchip,rk3328-gmac";
> + reg = <0x0 0xff55 0x0 0x1>;
> + rockchip,grf = <>;
> + interrupts = ;
> + interrupt-names = "macirq";
> + clocks = < SCLK_MAC2PHY_SRC>, < SCLK_MAC2PHY_RXTX>,
> +  < SCLK_MAC2PHY_RXTX>, < SCLK_MAC2PHY_REF>,
> +  < ACLK_MAC2PHY>, < PCLK_MAC2PHY>,
> +  < SCLK_MAC2PHY_OUT>;
> + clock-names = "stmmaceth", "mac_clk_rx",
> +   "mac_clk_tx", "clk_mac_ref",
> +   "aclk_mac", "pclk_mac",
> +   "clk_macphy";
> + resets = < SRST_GMAC2PHY_A>, < SRST_MACPHY>;
> + reset-names = "stmmaceth", "mac-phy";
> + phy-mode = "rmii";
> + phy-is-internal;
> + pinctrl-names = "default";
> + pinctrl-0 = <_rxm1 _linkm1>;
> + status = "disabled";

But where is the the phy-handle property that points to this internal
PHY? Even if it is internal, it should be described properly with a mdio
bus sub-node and a standard Ethernet PHY node as specified by both
Documentation/devicetree/bindings/net/mdio.txt and
Documentation/devicetree/bindings/net/phy.txt

That means we should at least see something like this (on top of what
you added already)
phy-handle = <>;

mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;

phy@0 {
compatible = "ethernet-phy-id1234.d400", 
"ethernet-phy-802.3-c22";
reg = <0>;
phy-is-internal;
};
};

> + };
> +
>   gic: interrupt-controller@ff811000 {
>   compatible = "arm,gic-400";
>   #interrupt-cells = <3>;
> 


-- 
Florian

Re: [PATCH v3 10/11] ARM64: dts: rockchip: Add gmac2phy node support for rk3328

2017-08-02 Thread Sergei Shtylyov 

Hello!

On 08/02/2017 09:24 AM, David Wu wrote:


The gmac2phy controller of rk3328 is connected to internal phy
directly inside, add the node for the internal phy support.

Signed-off-by: David Wu 
---
  arch/arm64/boot/dts/rockchip/rk3328.dtsi | 25 +
  1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..51c8c66 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi

[...]

@@ -424,6 +426,29 @@
status = "disabled";
};
  
+	gmac2phy: eth@ff55 {


   The standardized name is ethernet@...

[...]

MBR, Sergei

[PATCH v3 10/11] ARM64: dts: rockchip: Add gmac2phy node support for rk3328

2017-08-02 Thread David Wu 
The gmac2phy controller of rk3328 is connected to internal phy
directly inside, add the node for the internal phy support.

Signed-off-by: David Wu 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..51c8c66 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -63,6 +63,8 @@
i2c1 = 
i2c2 = 
i2c3 = 
+   ethernet0 = 
+   ethernet1 = 
};
 
cpus {
@@ -424,6 +426,29 @@
status = "disabled";
};
 
+   gmac2phy: eth@ff55 {
+   compatible = "rockchip,rk3328-gmac";
+   reg = <0x0 0xff55 0x0 0x1>;
+   rockchip,grf = <>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   clocks = < SCLK_MAC2PHY_SRC>, < SCLK_MAC2PHY_RXTX>,
+< SCLK_MAC2PHY_RXTX>, < SCLK_MAC2PHY_REF>,
+< ACLK_MAC2PHY>, < PCLK_MAC2PHY>,
+< SCLK_MAC2PHY_OUT>;
+   clock-names = "stmmaceth", "mac_clk_rx",
+ "mac_clk_tx", "clk_mac_ref",
+ "aclk_mac", "pclk_mac",
+ "clk_macphy";
+   resets = < SRST_GMAC2PHY_A>, < SRST_MACPHY>;
+   reset-names = "stmmaceth", "mac-phy";
+   phy-mode = "rmii";
+   phy-is-internal;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rxm1 _linkm1>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
-- 
1.9.1