On Mon, Oct 8, 2018 at 5:46 PM Arnd Bergmann wrote:
>
> On Sun, Oct 7, 2018 at 5:00 PM wrote:
> >
> > From: Sunil Goutham
> >
> > Go through all BLKADDRs and check which ones are implemented
> > on this silicon and do a HW reset of each implemented block.
> > Also added all RVU AF and PF
On Sun, Oct 7, 2018 at 5:00 PM wrote:
>
> From: Sunil Goutham
>
> Go through all BLKADDRs and check which ones are implemented
> on this silicon and do a HW reset of each implemented block.
> Also added all RVU AF and PF register offsets.
>
>
> +/* Poll a RVU block's register 'offset', for a
From: Sunil Goutham
Go through all BLKADDRs and check which ones are implemented
on this silicon and do a HW reset of each implemented block.
Also added all RVU AF and PF register offsets.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 78 ++