Am 04.06.2016 um 16:43 schrieb Langer, Thomas:
> Hello Hauke,
>
> [...]
>> +
>> +static int xway_gphy_ack_interrupt(struct phy_device *phydev)
>> +{
>> +int reg;
>> +
>> +/**
>> + * Possible IRQ numbers:
>> + * - IM3_IRL18 for GPHY0
>> + * - IM3_IRL17 for GPHY1
>
> These
Hi Thomas
Hi Hauke
On 04/06/2016 16:43, Langer, Thomas wrote:
>> + /* there is an errata regarding irqs in this rev */
> And then this is comment is also now valid.
> What about a system with a single external phy connected,
> on a non-Lantiq/Intel SoC?
>
> I think the feasibility of
Hello Hauke,
[...]
> +
> +static int xway_gphy_ack_interrupt(struct phy_device *phydev)
> +{
> + int reg;
> +
> + /**
> + * Possible IRQ numbers:
> + * - IM3_IRL18 for GPHY0
> + * - IM3_IRL17 for GPHY1
These are references to the SoC interrupts.
> + *
> + * Due
