[PATCH net-next] net: mvpp2: Add missing VLAN tag detection

2018-05-18 Thread Maxime Chevallier
of detecting when there is a single VLAN tag. This commits adds the missing update of the result_info in this case. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- drivers/net/ethernet/marvell/mvpp2.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/et

Link modes representation in phylib

2018-06-18 Thread Maxime Chevallier
phy.h#L441 [2] https://elixir.bootlin.com/linux/v4.18-rc1/source/include/linux/phy.h#L512 -- Maxime Chevallier, Bootlin (formerly Free Electrons) Embedded Linux and kernel engineering https://bootlin.com

[PATCH net-next 0/2] net: mvpp2: Add Unicast filtering capabilities

2018-03-07 Thread Maxime Chevallier
promiscuous mode. The first patch reworks the function that adds and removes addresses to the filter. This is preparatory work to ease UC filter implementation. The second patch adds the UC filtering feature. Maxime Chevallier (2): net: mvpp2: Simplify MAC filtering function parameters net: mvpp2

[PATCH net-next 2/2] net: mvpp2: Add support for unicast filtering

2018-03-07 Thread Maxime Chevallier
er unicast or multicast range for one port is full, the filtering is disabled and port goes into promiscuous mode for the given type of addresses. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- drivers/net/ethernet/marvell/mvpp2.c | 296 +++ 1 f

[PATCH net-next 1/2] net: mvpp2: Simplify MAC filtering function parameters

2018-03-07 Thread Maxime Chevallier
addresses to the per-port filter. This commit changes the function so that it takes struct mvpp2_port as a parameter instead. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- drivers/net/ethernet/marvell/mvpp2.c | 30 +++--- 1 file changed, 15 inse

[PATCH net] net: mvpp2: Fix parser entry init boundary check

2018-04-05 Thread Maxime Chevallier
Boundary check in mvpp2_prs_init_from_hw must be done according to the passed "tid" parameter, not the mvpp2_prs_entry index, which is not yet initialized at the time of the check. Fixes: 47e0e14eb1a6 ("net: mvpp2: Make mvpp2_prs_hw_read a parser entry init function") S

[PATCH net] net: mvpp2: Fix DMA address mask size

2018-04-18 Thread Maxime Chevallier
PPv2 TX/RX descriptors uses 40bits DMA addresses, but 41 bits masks were used (GENMASK_ULL(40, 0)). This commit fixes that by using the correct mask. Fixes: e7c5359f2eed ("net: mvpp2: introduce PPv2.2 HW descriptors and adapt accessors") Signed-off-by: Maxime Chevallier <m

[PATCH net] net: mvpp2: Fix TCAM filter reserved range

2018-04-16 Thread Maxime Chevallier
wed before switching to promiscuous mode. Fixes: 10fea26ce2aa ("net: mvpp2: Add support for unicast filtering") Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- drivers/net/ethernet/marvell/mvpp2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dr

[PATCH net 0/3] net: mvpp2: Fix hangs when starting some interfaces on 7k/8k

2018-04-25 Thread Maxime Chevallier
or finding the root cause of this bug. Maxime Chevallier (3): net: mvpp2: Fix clk error path in mvpp2_probe net: mvpp2: Fix clock resource by adding missing mg_core_clk ARM64: dts: marvell: armada-cp110: Add clocks for the xmdio node .../devicetree/bindings/net/marvell-pp2.txt| 9 +++

[PATCH net 3/3] ARM64: dts: marvell: armada-cp110: Add clocks for the xmdio node

2018-04-25 Thread Maxime Chevallier
ation") Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index 6c137ac656

Re: [PATCH net 2/3] net: mvpp2: Fix clock resource by adding missing mg_core_clk

2018-04-25 Thread Maxime Chevallier
Hi Gregory, On Wed, 25 Apr 2018 13:43:14 +0200 Gregory CLEMENT <gregory.clem...@bootlin.com> wrote: >Hi Maxime, > > On mer., avril 25 2018, Maxime Chevallier > <maxime.chevall...@bootlin.com> wrote: > >> Marvell's PPv2.2 IP needs an additional clock named &qu

[PATCH net 2/3] net: mvpp2: Fix clock resource by adding missing mg_core_clk

2018-04-25 Thread Maxime Chevallier
quot;clk: mvebu: cp110: Fix clock tree representation") Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- .../devicetree/bindings/net/marvell-pp2.txt | 9 + arch/arm64/boot/dts/marvell/armada-cp110.dtsi| 5 +++-- drivers/net/ethernet/marvell/mv

[PATCH net 1/3] net: mvpp2: Fix clk error path in mvpp2_probe

2018-04-25 Thread Maxime Chevallier
When clk_prepare_enable fails for the axi_clk, the mg_clk isn't properly cleaned up. Add another jump label to handle that case, and make sure we jump to it in the later error cases. Fixes: 4792ea04bcd0 ("net: mvpp2: Fix clock resource by adding an optional bus clock") Signed-off-

[PATCH net-next] net: mvpp2: Use relaxed I/O in data path

2018-03-27 Thread Maxime Chevallier
> [Maxime: Commit message, cosmetic changes] Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- David, this patch should not conflict with other the pending PPv2 series I sent earlier ("[PATCH net-next 0/2] net: mvpp2: Remove unnecessary dynamic allocs") drivers/

[PATCH net-next 2/2] net: mvpp2: Don't use dynamic allocs for local variables

2018-03-26 Thread Maxime Chevallier
entry, we simply return the TCAM id that matches the requested entry. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- V2: Remove unnecessary brackets, following Antoine Tenart's review. V3: Make sure prs_entry objects are zeroed before using them, following David

[PATCH net-next 1/2] net: mvpp2: Make mvpp2_prs_hw_read a parser entry init function

2018-03-26 Thread Maxime Chevallier
, by passing it the index as a parameter. The function now zeroes the entry, and sets the index field before doing all other init from HW. The function is renamed 'mvpp2_prs_init_from_hw' to make that clear. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- drivers/net/et

[PATCH net-next 0/2] net: mvpp2: Remove unnecessary dynamic allocs

2018-03-26 Thread Maxime Chevallier
into mvpp2_prs_init_from_hw, make it zero-out the struct and take the index as a parameter. That's what's done in the first patch of the series. The second patch is the V3 of ("net: mvpp2: Don't use dynamic allocs for local variables"), making use of mvpp2_prs_init_from_hw and taking previous comments into accoun

[PATCH net-next] net: mvpp2: Don't use dynamic allocs for local variables

2018-03-20 Thread Maxime Chevallier
entry, we simply return the TCAM id that matches the requested entry. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- drivers/net/ethernet/marvell/mvpp2.c | 282 +++ 1 file changed, 124 insertions(+), 158 deletions(-) diff --git a/drive

Re: [PATCH net-next v2] net: mvpp2: Don't use dynamic allocs for local variables

2018-03-21 Thread Maxime Chevallier
Hello Yan, On Wed, 21 Mar 2018 19:57:47 +, Yan Markman wrote : > Hi Maxime Please avoid top-posting on this list. > Please check the TWO points: > > 1). The mvpp2_prs_flow_find() returns TID if found > The TID=0 is valid FOUND value > For Not-found use

Re: [PATCH net-next v2] net: mvpp2: Don't use dynamic allocs for local variables

2018-03-22 Thread Maxime Chevallier
Hello David, On Thu, 22 Mar 2018 14:47:09 -0400 (EDT), David Miller <da...@davemloft.net> wrote : > From: Maxime Chevallier <maxime.chevall...@bootlin.com> > Date: Wed, 21 Mar 2018 16:14:00 +0100 > > > diff --git a/drivers/net/ethernet/marvell/mvpp2.c > > b/dri

Re: [PATCH net-next v2] net: mvpp2: Don't use dynamic allocs for local variables

2018-03-22 Thread Maxime Chevallier
On Thu, 22 Mar 2018 15:43:08 -0400 (EDT), David Miller <da...@davemloft.net> wrote : > From: Maxime Chevallier <maxime.chevall...@bootlin.com> > Date: Thu, 22 Mar 2018 20:14:53 +0100 > > > Hello David, > > > > On Thu, 22 Mar 2018 14:47:09 -0400 (EDT)

[PATCH net-next v2] net: mvpp2: Don't use dynamic allocs for local variables

2018-03-21 Thread Maxime Chevallier
entry, we simply return the TCAM id that matches the requested entry. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- V2: Remove unnecessary brackets, following Antoine Tenart's review. drivers/net/ethernet/marvell/mvpp2.c | 289 +++

[PATCH net-next] net: mvpp2: Add hardware offloading for VLAN filtering

2018-02-27 Thread Maxime Chevallier
implements the ndo_set_features to allow for disabling of VLAN filtering using ethtool. The default config has VLAN filtering disabled. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- drivers/net/ethernet/marvell/mvpp2.c | 414 --- 1 file c

[PATCH net-next v2] net: mvpp2: Add hardware offloading for VLAN filtering

2018-02-28 Thread Maxime Chevallier
implements the ndo_set_features to allow for disabling of VLAN filtering using ethtool. The default config has VLAN filtering disabled. Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com> --- V2: Use correct order for local variable declarations drivers/net/ethernet/marvell/m

[PATCH net v2 1/2] net: mvpp2: Fix clk error path in mvpp2_probe

2018-04-25 Thread Maxime Chevallier
When clk_prepare_enable fails for the axi_clk, the mg_clk isn't properly cleaned up. Add another jump label to handle that case, and make sure we jump to it in the later error cases. Fixes: 4792ea04bcd0 ("net: mvpp2: Fix clock resource by adding an optional bus clock") Signed-off-

[PATCH net v2 0/2] net: mvpp2: Fix hangs when starting some interfaces on 7k/8k

2018-04-25 Thread Maxime Chevallier
ove all DT patches from this series, they will be merged through the mvebu tree. Maxime Chevallier (2): net: mvpp2: Fix clk error path in mvpp2_probe net: mvpp2: Fix clock resource by adding missing mg_core_clk drivers/net/ethernet/marvell/mvpp2.c | 30 +++--- 1 file c

[PATCH net v2 2/2] net: mvpp2: Fix clock resource by adding missing mg_core_clk

2018-04-25 Thread Maxime Chevallier
Marvell's PPv2.2 IP needs an additional clock named "MG Core clock". This is required on Armada 7K and 8K. This commit adds the required clock in mvpp2, making sure it's only used on PPv2.2. Fixes: c7e92def1ef4 ("clk: mvebu: cp110: Fix clock tree representation") Signed-off-b

Re: Link modes representation in phylib

2018-06-19 Thread Maxime Chevallier
Hello Andrew, Thanks for your feedback ! >> I'm currently working on adding support for 2.5GBaseT on some Marvell >> PHYs (the marvell10g family, including the 88X3310). >> >> However, phylib doesn't quite support these modes yet. Its stores the >> different supported and advertised modes in

[PATCH net-next 1/4] net: mvpp2: Make TX / RX descriptors little-endian

2018-06-28 Thread Maxime Chevallier
The PPv2 controller always expect descriptors to be in little endian. We must therefore force descriptors to use that format, and convert to the host endianness when necessary. Signed-off-by: Maxime Chevallier --- drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 56

Re: Link modes representation in phylib

2018-06-29 Thread Maxime Chevallier
On Fri, 29 Jun 2018 17:34:41 +0200 Andrew Lunn wrote: >> Wow indeed that will help a lot. Just so that we're in sync, do you >> plan to add those helpers, or should I take this branch as a base for >> the conversion and go on ? > >I'm still working on it. I can probably push again in the next

Re: Link modes representation in phylib

2018-06-29 Thread Maxime Chevallier
, making it easier to >update. It might make sense to add a couple of more helpers, for what >remains. Wow indeed that will help a lot. Just so that we're in sync, do you plan to add those helpers, or should I take this branch as a base for the conversion and go on ? Thanks for this,

Re: Link modes representation in phylib

2018-06-29 Thread Maxime Chevallier
Hello Andrew, On Tue, 19 Jun 2018 17:21:55 +0200 Andrew Lunn wrote: >> What I propose is that we add 3 link_mode fields in phy_device, and keep >> the legacy fields for now. It would be up to the driver to fill the new >> "supported" field in config_init, kind of like what's done in the >>