Re: [PATCH net-next v2 1/2] net: phy: realtek: add support for EEE registers on integrated PHY's

[Florian Fainelli]

On 8/15/2019 5:12 AM, Heiner Kallweit wrote:
> EEE-related registers on newer integrated PHY's have the standard
> layout, but are accessible not via MMD but via vendor-specific
> registers. Emulating the standard MMD registers allows to use the
> generic functions for EEE control.
> 
> Signed-off-by: Heiner Kallweit 

Reviewed-by: Florian Fainelli 
-- 
Florian

[PATCH net-next v2 1/2] net: phy: realtek: add support for EEE registers on integrated PHY's

[Heiner Kallweit]

EEE-related registers on newer integrated PHY's have the standard
layout, but are accessible not via MMD but via vendor-specific
registers. Emulating the standard MMD registers allows to use the
generic functions for EEE control.

Signed-off-by: Heiner Kallweit 
---
 drivers/net/phy/realtek.c | 43 +++
 1 file changed, 43 insertions(+)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index c49a1fb13..2635ad1ff 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -266,6 +266,45 @@ static int rtl8366rb_config_init(struct phy_device *phydev)
return ret;
 }
 
+static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+{
+   int ret;
+
+   if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
+   rtl821x_write_page(phydev, 0xa5c);
+   ret = __phy_read(phydev, 0x12);
+   rtl821x_write_page(phydev, 0);
+   } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+   rtl821x_write_page(phydev, 0xa5d);
+   ret = __phy_read(phydev, 0x10);
+   rtl821x_write_page(phydev, 0);
+   } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
+   rtl821x_write_page(phydev, 0xa5d);
+   ret = __phy_read(phydev, 0x11);
+   rtl821x_write_page(phydev, 0);
+   } else {
+   ret = -EOPNOTSUPP;
+   }
+
+   return ret;
+}
+
+static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
+   u16 val)
+{
+   int ret;
+
+   if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+   rtl821x_write_page(phydev, 0xa5d);
+   ret = __phy_write(phydev, 0x10, val);
+   rtl821x_write_page(phydev, 0);
+   } else {
+   ret = -EOPNOTSUPP;
+   }
+
+   return ret;
+}
+
 static int rtl8125_get_features(struct phy_device *phydev)
 {
int val;
@@ -422,6 +461,8 @@ static struct phy_driver realtek_drvs[] = {
.resume = genphy_resume,
.read_page  = rtl821x_read_page,
.write_page = rtl821x_write_page,
+   .read_mmd   = rtlgen_read_mmd,
+   .write_mmd  = rtlgen_write_mmd,
}, {
.name   = "RTL8125 2.5Gbps internal",
.match_phy_device = rtl8125_match_phy_device,
@@ -432,6 +473,8 @@ static struct phy_driver realtek_drvs[] = {
.resume = genphy_resume,
.read_page  = rtl821x_read_page,
.write_page = rtl821x_write_page,
+   .read_mmd   = rtlgen_read_mmd,
+   .write_mmd  = rtlgen_write_mmd,
}, {
PHY_ID_MATCH_EXACT(0x001cc961),
.name   = "RTL8366RB Gigabit Ethernet",
-- 
2.22.1