On Mon, 2020-03-09 at 14:59 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 2:42 PM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 14:31 -0700, H.J. Lu wrote:
> > > On Mon, Mar 9, 2020 at 2:15 PM Simo Sorce wrote:
> > > > On Mon, 2020-03-09 at 12:46 -0700, H.J. Lu wrote:
> > > > > On Mon, Mar 9,
On Mon, 2020-03-09 at 14:31 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 2:15 PM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 12:46 -0700, H.J. Lu wrote:
> > > On Mon, Mar 9, 2020 at 12:22 PM Simo Sorce wrote:
> > > > On Mon, 2020-03-09 at 15:19 -0400, Simo Sorce wrote:
> > > > > On Mon,
On Mon, 2020-03-09 at 12:46 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 12:22 PM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 15:19 -0400, Simo Sorce wrote:
> > > On Mon, 2020-03-09 at 11:56 -0700, H.J. Lu wrote:
> > > > On Mon, Mar 9, 2020 at 11:19 AM Simo Sorce wrote:
> > > > > On Mon,
On Mon, 2020-03-09 at 15:19 -0400, Simo Sorce wrote:
> On Mon, 2020-03-09 at 11:56 -0700, H.J. Lu wrote:
> > On Mon, Mar 9, 2020 at 11:19 AM Simo Sorce wrote:
> > > On Mon, 2020-03-09 at 19:03 +0100, Niels Möller wrote:
> > > > Simo Sorce writes:
> > > >
> > > > > The patchset i solder than I
On Mon, 2020-03-09 at 11:56 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 11:19 AM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 19:03 +0100, Niels Möller wrote:
> > > Simo Sorce writes:
> > >
> > > > The patchset i solder than I did remember, April 2019
> > > > But I recall running at least one
Daiki Ueno writes:
> From: Daiki Ueno
>
> The ChaCha20 based header protection algorithm in QUIC requires a way
> to set the initial value of counter:
> https://quicwg.org/base-drafts/draft-ietf-quic-tls.html#name-chacha20-based-header-prote
>
> This will add a new function chacha_set_counter,
On Mon, 2020-03-09 at 19:03 +0100, Niels Möller wrote:
> Simo Sorce writes:
>
> > The patchset i solder than I did remember, April 2019
> > But I recall running at least one version of it on our CET emulator @
> > Red Hat.
>
> Sorry I forgot to followup on that. It seems only the first easy
Simo Sorce writes:
> The patchset i solder than I did remember, April 2019
> But I recall running at least one version of it on our CET emulator @
> Red Hat.
Sorry I forgot to followup on that. It seems only the first easy cleanup
patch, "Add missing EPILOGUEs in assembly files", was applied
On Mon, 2020-03-09 at 08:33 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 5:36 AM Simo Sorce wrote:
> > On Sat, 2020-03-07 at 17:49 +0100, Niels Möller wrote:
> > > "H.J. Lu" writes:
> > >
> > > > Intel Control-flow Enforcement Technology (CET):
> > > >
> > > >
On Sat, 2020-03-07 at 17:49 +0100, Niels Möller wrote:
> "H.J. Lu" writes:
>
> > Intel Control-flow Enforcement Technology (CET):
> >
> > https://software.intel.com/en-us/articles/intel-sdm
> >
> > contains shadow stack (SHSTK) and indirect branch tracking (IBT). When
> > CET is enabled, ELF
From: Daiki Ueno
The ChaCha20 based header protection algorithm in QUIC requires a way
to set the initial value of counter:
https://quicwg.org/base-drafts/draft-ietf-quic-tls.html#name-chacha20-based-header-prote
This will add a new function chacha_set_counter, which takes an
8-octet initial
From: Daiki Ueno
While the documentation said the nonce size is 8 octets, the
implementation actually assumed 12 octets following RFC 7539.
Signed-off-by: Daiki Ueno
---
nettle.texinfo | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/nettle.texinfo
From: Daiki Ueno
The ChaCha-Poly1305 implementation previously used the chacha_crypt
function that assumes the block counter is 64-bit long, while RFC 8439
defines that the counter is 32-bit long. Although this should be fine
as long as up to 256 gigabytes of data is encrypted with the same
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