Maamoun TK writes:
> Sure. According to Power ISA 2.07:
> The lvsl and lvsr instructions can be used to create the permute control
> vector to be used by a subsequent vperm instruction.
>
> So the lvsl and lvsr instructions check 'sh' value in order to fill the
> vector register, if 'sh' is 0
ni...@lysator.liu.se (Niels Möller) writes:
> Maamoun TK writes:
>
>> The last patch follows the C implementation but I just figured out a decent
>> way to do it.
>
> Thanks! Applied, and pushed on the ppc-chacha-core branch for testing.
> (Had apply it semi-manually, since the file to patch
Maamoun TK writes:
> The last patch follows the C implementation but I just figured out a decent
> way to do it.
Thanks! Applied, and pushed on the ppc-chacha-core branch for testing.
(Had apply it semi-manually, since the file to patch indents using TAB
and those were replaced by spaces in the
The last patch follows the C implementation but I just figured out a decent
way to do it.
---
powerpc64/p7/chacha-core-internal.asm | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/powerpc64/p7/chacha-core-internal.asm
