On Tue, Dec 2, 2014 at 8:38 AM, poma pomidorabelis...@gmail.com wrote:
Is this expected result for Chipset: G98 (NV98)?
Yep, 100% expected. [Perhaps you might glance at the wiki page you got
that from for clues as to why.]
$ modinfo nvidia -F version
304.123
$ stat -c %s mmiotrace.log
On Tue, Dec 2, 2014 at 8:50 AM, poma pomidorabelis...@gmail.com wrote:
On 02.12.2014 14:40, Ilia Mirkin wrote:
On Tue, Dec 2, 2014 at 8:38 AM, poma pomidorabelis...@gmail.com wrote:
Is this expected result for Chipset: G98 (NV98)?
Yep, 100% expected. [Perhaps you might glance at the wiki page
I believe you're attempting to follow instructions for creating an
account to edit freedesktop wiki pages. When you see a ? next to a
link, that means that the page isn't there, and it takes you to a form
to create that page (for which you need to have a wiki account).
I thought we fixed most of
to not trigger ttm migrations in
test scenarios.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=85465
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=59168
Cc: sta...@vger.kernel.org
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
nvkm/engine/device/nvc0.c | 1 -
1 file changed, 1 deletion
On Thu, Nov 27, 2014 at 11:39 AM, Thierry Reding
thierry.red...@gmail.com wrote:
Tegra K1 and later use a GPU that can be driven by the Nouveau driver.
But the GPU is a pure render node and has no display engine, hence the
scanout needs to happen on the Tegra display hardware. The GPU and the
On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger arit...@nvidia.com wrote:
On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote:
On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger arit...@nvidia.com wrote:
Hi Ilia,
Actually 0x90b8 is different than copy engine. I'm not very familiar
On Tue, Nov 25, 2014 at 4:05 PM, Andy Ritger arit...@nvidia.com wrote:
On Tue, Nov 25, 2014 at 10:57:44AM -0500, Ilia Mirkin wrote:
On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger arit...@nvidia.com wrote:
On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote:
On Fri, Nov 21, 2014 at 1:16
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=86618
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
b/src/gallium
as to what we might be missing.
Thanks,
Ilia Mirkin
imir...@alum.mit.edu
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau
different fuc for it that
exposes somewhat different functionality via FIFO methods?
I hope that helps,
- Andy
On Thu, Nov 20, 2014 at 02:18:02PM -0500, Ilia Mirkin wrote:
Hello,
There's a long-standing bug on nouveau (this is a sample bug, but the
issue has been around for a while:
https
On Wed, Nov 19, 2014 at 2:42 PM, Ben Skeggs skeg...@gmail.com wrote:
On 20 Nov 2014 01:31, 李金华 goo...@outlook.com wrote:
Hello everyone,
The code is at /core/subdev/bios/init.c.
When the executable is 0,these functions that parse the VBIOS init table
seems to do nothing except the parsing.
On Tue, Nov 18, 2014 at 8:54 AM, Roland Scheidegger srol...@vmware.com wrote:
Am 18.11.2014 um 05:03 schrieb Ilia Mirkin:
For values above integer accuracy in floats, val - floor(val) might
actually produce a value greater than 1. For such large floats, it's
reasonable to be imprecise
On Tue, Nov 18, 2014 at 9:53 AM, Jose Fonseca jfons...@vmware.com wrote:
On 18/11/14 14:34, Roland Scheidegger wrote:
Am 18.11.2014 um 15:05 schrieb Ilia Mirkin:
On Tue, Nov 18, 2014 at 8:54 AM, Roland Scheidegger srol...@vmware.com
wrote:
Am 18.11.2014 um 05:03 schrieb Ilia Mirkin
On Wed, Nov 19, 2014 at 12:41 AM, Alexandre Courbot acour...@nvidia.com wrote:
Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative
VRAM domains for chips that do not use dedicated video memory.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
For values above integer accuracy in floats, val - floor(val) might
actually produce a value greater than 1. For such large floats, it's
reasonable to be imprecise, but it's unreasonable for FRC to return a
value that is not between 0 and 1.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
res-bind is not an indicator of how the resource is currently bound.
buffers can be rebound across different binding points without changing
underlying storage.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.4 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/nv50
The number of vertex buffers has nothing to do with the number of bound
constbufs.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.4 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/nv50/nv50_context.c | 5 +++--
src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 4
Someone complained about pstate being in sysfs, and we haven't gotten
a chance to move it to debugfs yet, so it's behind a module parameter
(nouveau.pstate=1 iirc) for now. It'll probably move to debugfs at
some point.
On Thu, Nov 13, 2014 at 12:35 PM, Lucas Francesco
LG. I had this same patch locally I think... I came up with it after I went
looking at the various VRAM usage after you were asking questions about it.
On Tue, Nov 11, 2014 at 11:59 PM, Alexandre Courbot gnu...@gmail.com
wrote:
Ping, how about this guy?
On Mon, Oct 27, 2014 at 7:36 PM,
On Wed, Nov 5, 2014 at 5:23 AM, Alexandre Courbot acour...@nvidia.com wrote:
On 10/30/2014 12:29 AM, Ilia Mirkin wrote:
On Mon, Oct 27, 2014 at 6:34 AM, Alexandre Courbot acour...@nvidia.com
wrote:
GK20A does not have dedicated VRAM, therefore allocating in VRAM can be
sub-optimal
to see if there
was any response to my last message?
73 | KB3KEY | John | Mt.Airy,MD
On 10/25/2014 09:24 PM, Ilia Mirkin wrote:
Can you grab a copy of dmesg after resume? Can you try waiting ~2
minutes to see if gdm will restart on its own (due to X dying)? In
general, nouveau is less-than
Hello,
We're seeing a very odd issue on many (all?) tesla chips (G8x, G9x,
G200, GT21x) related to looping. People will have loops in glsl like
for (i = 0; i 200; i++) {
...
if (cond) break;
}
And it seems like if it breaks out of the loop early, all's well, but
eventually it peeters out
On Thu, Oct 30, 2014 at 5:57 PM, Roy Spliet rspl...@eclipso.eu wrote:
Commit 1dce6264045cd23e9c07574ed0bb31c7dce9354f introduced a regression
spotted
on several G94 (FDObz #85160). This device seems to expect the vblank period
to
I believe that's often done as a
Bugzilla:
On Mon, Oct 27, 2014 at 6:34 AM, Alexandre Courbot acour...@nvidia.com wrote:
GK20A does not have dedicated VRAM, therefore allocating in VRAM can be
sub-optimal and sometimes even harmful. Set its VRAM domain to
NOUVEAU_BO_GART so all objects are allocated in system memory.
Signed-off-by:
get further.
On Tue, Oct 28, 2014 at 5:15 PM, Victor Lefèvre victorlefe...@free.fr wrote:
Yes. I attached the logs.
(There is several error messages.)
Le 28/10/2014 21:43, Ilia Mirkin a écrit :
Output name 'default' is not the name of an output nouveau can produce
(or nvidia for that matter
What does 'xrandr' output?
On Sun, Oct 26, 2014 at 10:51 AM, Victor Lefèvre victorlefe...@free.fr wrote:
Hi everybody,
I'm using Lubuntu 14.04 on an old desktop PC with a NVIDIA GeForce 7600 GS
and a screen of 19 inches.
The maximal resolution of my screen with Nvidia drivers is 1280x1024.
Can you grab a copy of dmesg after resume? Can you try waiting ~2
minutes to see if gdm will restart on its own (due to X dying)? In
general, nouveau is less-than-great at resuming while 3d applications
are running. This used to be rare, but now people have things like
gnome-shell/etc which
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.3 mesa-sta...@lists.freedesktop.org
---
With this, all the tex-miplevel-selection tests pass on maxwell. There is a
minor bit of this change which affects textureGrad on kepler that I have yet
to test, but I'm moderately sure it's correct
There is no dedicated instruction for this, so just combine it with the
constant offset.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.3 mesa-sta...@lists.freedesktop.org
---
This fixes the spec/glsl-1.50/execution/geometry/dynamic_input_array_index
piglit test.
src/gallium/drivers
://bugs.freedesktop.org/show_bug.cgi?id=79462
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Noticed the texbars when looking at maxwell stuff, and nvf0 wouldn't
even compile without the new flags, which I made to match the nve0
versions.
Untested.
src/shader/exac8nvf0.fp | 4 ++--
src/shader/exac8nvf0.fpc | 4 ++--
src/shader
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/shader/Makefile | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/shader/Makefile b/src/shader/Makefile
index 46658e9..2d789be 100644
--- a/src/shader/Makefile
+++ b/src/shader/Makefile
@@ -24,20 +24,21
On Fri, Sep 19, 2014 at 10:41 AM, Ortwin Glück o...@odi.ch wrote:
On 18.09.2014 16:58, Ilia Mirkin wrote:
This has been reported a few times already -- probably the same thing
as bug https://bugs.freedesktop.org/show_bug.cgi?id=83550
Ah, thanks. I would like to try with that commit reverted
On Thu, Sep 18, 2014 at 10:07 AM, Ortwin Glück o...@odi.ch wrote:
Hi,
Since 3.16 an external monitor stays dark after resume from sleep. I didn't
manage to activate it
again with xrand. According to xrandr it is connected and configured with a
mode, but I get no signal.
Happens since
There were reports of issues with gallium-nine. It's unclear whether mesa/st
uses these, the patches did not produce any piglit changes. However they seem
right...
Ilia Mirkin (2):
nv50,nvc0: add missing depth/stencil formats to tile flag selection
nv50,nvc0: fix 3d blit logic for odd depth
Reported-by: David Heidelberger david.heidelber...@ixit.cz
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nv50/nv50_miptree.c | 4
src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c | 4
2 files changed, 8 insertions(+)
diff --git a/src/gallium/drivers
Reported-by: David Heidelberger david.heidelber...@ixit.cz
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nv50/nv50_blit.h| 21 ++---
src/gallium/drivers/nouveau/nv50/nv50_surface.c | 4
2 files changed, 18 insertions(+), 7 deletions
On Mon, Sep 15, 2014 at 4:23 AM, poma pomidorabelis...@gmail.com wrote:
Chipset: G98 (NV98)
Family : NV50
WORKING VIDEO RESUME(S3)
3.15.0-rc8.1.git.7a014a8
3.15.0-rc8.2.git.456b057
3.15.0-rc8.3.git.b8407c9
3.15.0-rc8.4.git.bb7ef1e
BROKEN VIDEO RESUME(S3)
On Mon, Sep 15, 2014 at 1:28 PM, poma pomidorabelis...@gmail.com wrote:
On 15.09.2014 15:36, Ilia Mirkin wrote:
On Mon, Sep 15, 2014 at 4:23 AM, poma pomidorabelis...@gmail.com wrote:
Chipset: G98 (NV98)
Family : NV50
WORKING VIDEO RESUME(S3)
3.15.0-rc8.1.git.7a014a8
3.15.0-rc8.2.git
On Sun, Sep 14, 2014 at 3:37 AM, Francisco Jerez curroje...@riseup.net wrote:
Ilia Mirkin imir...@alum.mit.edu writes:
mesa_texstore expects pixel data, not compressed data. For compressed
textures, we want to just copy the bits in without any conversion.
Any reason we cannot use
What problem are you trying to solve? Perhaps you can start by
describing the symptoms, providing logs, etc?
On Sat, Sep 13, 2014 at 11:24 AM, asd a...@marian1000.go.ro wrote:
Hi
On NV_40 on driver is sent instructions from NVE0 series
not right
I inspected register 9012c with nvtools
and
On Sat, Sep 13, 2014 at 4:52 PM, poma pomidorabelis...@gmail.com wrote:
On 13.09.2014 07:02, poma wrote:
On 13.09.2014 06:57, poma wrote:
Actually I have nothing to show cause logs are all OK.
Haha, it seems to me that the bugs become intelligent.
3.15.10-201.fc20.x86_64
On Sat, Sep 13, 2014 at 5:25 PM, poma pomidorabelis...@gmail.com wrote:
On 13.09.2014 22:58, Ilia Mirkin wrote:
On Sat, Sep 13, 2014 at 4:52 PM, poma pomidorabelis...@gmail.com wrote:
On 13.09.2014 07:02, poma wrote:
On 13.09.2014 06:57, poma wrote:
Actually I have nothing to show cause logs
mesa_texstore expects pixel data, not compressed data. For compressed
textures, we want to just copy the bits in without any conversion.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/mesa/drivers/dri/nouveau/nouveau_texture.c | 65 --
1 file changed, 52
On Tue, Sep 9, 2014 at 3:08 PM, pete nikolic pg.nikol...@gmail.com wrote:
Hi Folks
Getting a considerable number of these showing up at the moment
[ 619.350185] nouveau :01:00.0: Direct firmware load failed with error -2
[ 619.350193] nouveau :01:00.0: Falling back to user
On Thu, Sep 4, 2014 at 8:37 AM, asd a...@marian1000.go.ro wrote:
Hi
For NV40 attach one patch which leave unused second channel used on
NV50 and more.
What exactly are you saying is being leaked? What problem is your
patch trying to solve?
-ilia
This should probably be folded into the previous patch to avoid
breaking bisectability on nve0
On Thu, Sep 4, 2014 at 10:58 AM, Roy Spliet rspl...@eclipso.eu wrote:
This used to be done implicitly
Signed-off-by: Roy Spliet rspl...@eclipso.eu
---
Only the NVA3/5/8/F tesla chips have a copy engine. Don't bother trying
to create one on earlier tesla chips (and thus printing an error on
failure).
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nouveau_copy.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/nouveau_copy.c
Hi Maarten,
I'm seeing these prints, which feel like they're accompanied by bad frames:
0x7f7fcb29ab70 is not a real ref: -0.011 72712/72709 0% 35% 1.0% 0 0
This comes from
if (dec-refs[idx].vidbuf != refs[i]) {
debug_printf(%p is not a real ref\n, refs[i]);
// FIXME:
On Tue, Sep 2, 2014 at 2:27 PM, thirstygnome thirstygn...@gmail.com wrote:
I have a Lenovo y510p laptop that has two 755's in sli. It seems at this
time Nvidia does not have support for SLI on Linux. Do you support this with
the 755m card? If so please provide me with a link for instructions.
-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
b/src/gallium/drivers/nouveau/codegen
The mt address is about to be used more, make sure it's set
appropriately.
Reported-by: Emil Velikov emil.l.veli...@gmail.com
Tested-by: Emil Velikov emil.l.veli...@gmail.com
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers
The current code... makes no sense. Use nouveau_bo_ref to attach the bo
to the exposed resource so as to have the proper lifetime guarantees.
Tested-by: Emil Velikov emil.l.veli...@gmail.com
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src
with VDPAU.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82255
Tested-by: Emil Velikov emil.l.veli...@gmail.com
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 4 ++--
src/gallium/drivers
tobias.johannes.klausm...@mni.thm.de
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 32 +-
.../nouveau/codegen/nv50_ir_lowering_nvc0.h| 5 +++-
2 files changed, 29
Samplers are only defined up to num_samplers, so set all samplers above
nr to NULL so that we don't try to read them again later.
Tested-by: Christian Ruppert id...@qasl.de
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers
On Sat, Aug 30, 2014 at 7:30 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
On 30/08/14 23:02, Ilia Mirkin wrote:
Samplers are only defined up to num_samplers, so set all samplers above
nr to NULL so that we don't try to read them again later.
Would it be worth doing a similar thing
On Mon, Aug 25, 2014 at 2:58 PM, Christian Costa titan.co...@gmail.com wrote:
---
nvbios/info.c | 4
1 file changed, 4 insertions(+)
diff --git a/nvbios/info.c b/nvbios/info.c
index 87a33d8..6b8d209 100644
--- a/nvbios/info.c
+++ b/nvbios/info.c
@@ -119,6 +119,10 @@ int
On Thu, Aug 21, 2014 at 7:45 AM, Roy Spliet rspl...@eclipso.eu wrote:
Signed-off-by: Roy Spliet rspl...@eclipso.eu
---
.../gpu/drm/nouveau/core/include/subdev/clock.h| 3 ++
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 45
++
the vertices used for the blit...)
I'll keep looking at this, but if anyone has any ideas, let me know.
On Sun, Aug 10, 2014 at 7:32 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Hello,
I'm trying to debug why fbo-copyteximage-simple is failing, and I'm...
failing. It's an extremely simple test. I'm
any ideas, let me know.
On Sun, Aug 10, 2014 at 7:32 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Hello,
I'm trying to debug why fbo-copyteximage-simple is failing, and I'm...
failing. It's an extremely simple test. I'm pretty sure that the
copyteximage part of it has nothing to do
As you've no doubt noticed, using magic numbers is the convention
used throughout the driver (except dispnv04 which is in a world of its
own), rather than the (occasional) macros. It's a trade-off, since the
magic numbers are a little harder to read, but they're much easier to
match up in traces.
On Mon, Aug 11, 2014 at 5:01 PM, Pavel Roskin pro...@gnu.org wrote:
Quoting Ilia Mirkin imir...@alum.mit.edu:
http://lists.freedesktop.org/archives/nouveau/2014-August/018270.html
http://lists.freedesktop.org/archives/nouveau/2014-August/018271.html
Please see if these help your issue
Please send these one email per patch, inlined. git send-email will
generally do the right thing, but you can do it manually too (just be
careful about preserving tabs, not wrapping, etc... most mail clients
mess it up one way or another)
On Mon, Aug 11, 2014 at 7:03 PM, Joel Holdsworth
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 47cf0ef..6b75a9e 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -461,7 +461,7 @@ setup_render_target(NVPtr pNv
The higher 0x800 was getting overwritten by the 0x7ff anyways, so it
wasn't doing any good. The mesa driver just uses 0x800 for the low
portion and doesn't set the 8 bit in the higher portion, so do the same
thing here.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 4
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index df2f561..47cf0ef 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -520,7 +520,7 @@ setup_picture(NVPtr pNv, PicturePtr
Doesn't actually end up mattering.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 6b75a9e..78bc739 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -132,7 +132,7
On Thu, Aug 7, 2014 at 3:40 PM, Pavel Roskin pro...@gnu.org wrote:
Quoting Ilia Mirkin imir...@alum.mit.edu:
On Thu, Aug 7, 2014 at 8:30 AM, Pavel Roskin pro...@gnu.org wrote:
Hello!
I've installed Fedora 20 Mate i386 on an old system with GeForce4 Ti 4200
AGP (NV25) and I see significant
Hello,
I'm trying to debug why fbo-copyteximage-simple is failing, and I'm...
failing. It's an extremely simple test. I'm pretty sure that the
copyteximage part of it has nothing to do with the failure, at least
it behaves identically when I just return tex instead of copiex_tex.
Without any
On Thu, Aug 7, 2014 at 8:30 AM, Pavel Roskin pro...@gnu.org wrote:
Hello!
I've installed Fedora 20 Mate i386 on an old system with GeForce4 Ti 4200
AGP (NV25) and I see significant visual defects. Many icons are not shown.
They can reappear if they are selected of the mouse goes over them.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 34 +-
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp| 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 25 ++
1 file changed, 25 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen
You probably want the drm-nouveau-next branch. Unfortunately master
does not appear to get updated anymore.
You can also attempt to build the very latest and greatest, which is
at http://cgit.freedesktop.org/~darktama/nouveau, although it will
only build against the latest kernels (usually).
On
What warning with what compiler? Pretty sure this builds cleanly for me.
On Jul 25, 2014 11:37 AM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
On Wed, Jul 23, 2014 at 10:32 AM, Clemens Eisserer linuxhi...@gmail.com wrote:
Hi again,
On my NV18 based laptop I experience artifacts related to text
(however, 2D performance is really great these days):
- With grayscale AA text is sometimes missing, often visible on the XFCE
desktop
-
On Wed, Jul 23, 2014 at 10:52 AM, Patrick Baggett
baggett.patr...@gmail.com wrote:
On Wed, Jul 23, 2014 at 9:41 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
On Wed, Jul 23, 2014 at 10:32 AM, Clemens Eisserer linuxhi...@gmail.com
wrote:
Hi again,
On my NV18 based laptop I experience
---
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +
src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp | 8 ++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
I noticed this in a review of the code trying to figure out why the next
problem was happening. This doesn't actually fix anything, but there's no
reason why phi nodes must be restricted to 32-bit registers. (Although they
are, for now.)
src
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
Was getting weird shader errors in dmat4*dmat4 which spilled one double-wide
register (i.e. size 8). envytools docs apparently list this as having to be
aligned to 0x10, and this indeed fixes it.
src
wanted to comment. They do not depend on the preliminary core fp64
work.
Ilia Mirkin (5):
nvc0: make sure that the local memory allocation is aligned to 0x10
nv50/ir: keep track of whether the program uses fp64
nvc0: mark shader header if fp64 is used
nv50/ir: fix hard-coded TYPE_U32 sized
register value.
This maintains the invariant that a phi node's defs and sources are
allocated the same register.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
I _think_ that the split case might also need this, in case there's a split
that feeds into phi nodes, and those phi nodes are never
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index c624e21..ce0207a 100644
--- a/src
On Thu, Jul 10, 2014 at 11:01 AM, Lampshade lampsh...@poczta.fm wrote:
Hello
in dmesg I always have these informations (I tested several kernels between
3.7 and 3.16-rc3):
[ 13.742006] nouveau E[ DRM] Pointer to TMDS table invalid
[ 13.742036] nouveau [ DRM] DCB version 4.0
[
nouveau_fence_update does real work unconditionally. Avoid doing that if
the fence we're checking on has already been signalled.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nouveau_fence.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium
From: Christoph Bumiller e0425...@student.tuwien.ac.at
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
docs/GL3.txt | 5 +-
docs/relnotes/10.3.html| 1 +
src/gallium/drivers/nouveau/nouveau_screen.c | 6 +-
src/gallium
From: Christoph Bumiller e0425...@student.tuwien.ac.at
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
.../drivers/nouveau/nvc0/nvc0_vbo_translate.c | 41 +++---
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0
nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS
Ilia Mirkin (1):
nouveau: check if a fence has already been signalled
docs/GL3.txt | 5 +-
docs/relnotes/10.3.html| 1 +
src/gallium/drivers/nouveau/nouveau_fence.c
On Mon, Jul 7, 2014 at 10:19 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
This shortens runtime of piglit test fp-long-alu to ~22s
No piglit regressions observed on nvc0!
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
This is great. I'm going to run
Apparently TXD wants its offset differently than TEX, accepting it in
the upper bits of the layer index. Unclear what happens when this is
combined with indirect sampler indexing.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 47
Something about how we're implementing offsets for TXD is wrong, just
flip to the generic quadop-based implementation in that case.
This is the minimal fix appropriate for backporting.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers
On Sat, Jul 5, 2014 at 7:30 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Folding for conversions: F32/64-(U16/32, S16/32) and (U16/32, S16/32)-F32
No piglit regressions observed on nv50 and nvc0!
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
V2:
This can only happen with texture(samplerCubeShadow, bias), where the
compare will be in the first argument.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 +-
1 file changed, 1 insertion
Unfortunately there's no good way to do this on the nv50 shader isa.
Dropping the bias seems preferable to doing the compare post-filtering.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
handleTEX moves the layer as the first argument. This makes sure that
the quadops deal with the texture coordinates.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 5 +++--
1 file changed
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Based on a recent discussion in #radeon, and also my own observation that the
'full' scaling causes no end of confusion among users.
See https://bugs.freedesktop.org/show_bug.cgi?id=80868 for some more details,
although it is more radeon
On Thu, Jul 3, 2014 at 8:27 PM, Ben Skeggs skeg...@gmail.com wrote:
On Fri, Jul 4, 2014 at 5:27 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Based on a recent discussion in #radeon, and also my own observation that the
'full' scaling causes
mailto:wangyij...@huawei.com wrote:
On 2014/7/3 11:20, Ilia Mirkin wrote:
Hello,
A user (cc'd) reported that nouveau's enabling of MSI causes the card
to not work on his setup [1]. I think the situation is that MSI is
just not supported by the underlying motherboard, even
On Thu, Jul 3, 2014 at 11:09 PM, Yijing Wang wangyij...@huawei.com wrote:
On 2014/7/4 10:43, Ilia Mirkin wrote:
On Thu, Jul 3, 2014 at 10:35 PM, Yijing Wang wangyij...@huawei.com wrote:
Hi Brian,
From your 01:00.0 VGA compatible controller PCI config register, it
supports 1 MSI vector, so
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