/spec/arb_gpu_shader5/execution/built-in-functions/fs-bitfieldReverse.shader_test
- green output, so this should be ok
the test was not change though...
On 29.05.2014 21:47, Ilia Mirkin wrote:
Can you verify that you tested how the HW handles this, as well as
exactly how you did it (i.e. how
On Tue, Jun 3, 2014 at 4:58 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
V2: Handle the instruction right (shift after reverse)
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 16
On Tue, Jun 3, 2014 at 4:58 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 18
++
1 file changed, 18 insertions(+)
diff --git
On Tue, Jun 3, 2014 at 4:58 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
Reviewed-by: Ilia
Series is Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
There are a few minor formatting items that I'll take care of before
pushing this out later tonight... take a look at the changes I made
for the future :)
On Tue, Jun 3, 2014 at 6:35 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de
some missing bit.
Thanks,
-ilia
On Wed, Apr 30, 2014 at 12:10 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Great, thanks! I've looked at a bunch more shaders (unrelated to this)
in the meanwhile, and I'm pretty sure the extra FMA business is
totally unrelated to the issue at hand. It appears
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 mesa-sta...@lists.freedestkop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
b/src/gallium
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 mesa-sta...@lists.freedesktop.org
---
Pretty sure this was the cause of all the invalid opcode errors on like 20%
of the piglit tests. Any time the 3d blit path was used, this would trigger.
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
This fixes hangs on GK208 which happen instantaneously on trying to use a
geometry shader.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: sta...@vger.kernel.org # v3.14+
---
ctxnvf0 also writes to these registers (although slightly diff values), so I
think this is right. So I guess trap 4
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
MMIO32 R 0x17e91c 0x0b040a0b PMFB_BROADCAST.SUBP_BROADCAST.UNK11C = 0xb040a0b
MMIO32 R 0x17e920 0x00090c03 PMFB_BROADCAST.SUBP_BROADCAST.UNK120 = 0x90c03
MMIO32 W 0x17e91c 0x0b030a0c PMFB_BROADCAST.SUBP_BROADCAST.UNK11C = 0xb030a0c
MMIO32 W
First off, the current state of support for Maxwell (GM107/NV110) is
not very useful to end-users. It's especially not useful if it's a 3d
accelerator card without outputs (as yours appears to be), since
acceleration is not supported in 3.15 out of the box. You'd have to
figure out how to extract
On Sat, Jun 14, 2014 at 10:41 AM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
We use TGSI_SEMANTIC_VIEWPORT_INDEX for nvc0 now as well.
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h| 1 -
On Sat, Jun 14, 2014 at 10:41 AM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
src/gallium/drivers/nouveau/nvc0/nvc0_context.h| 7 +-
src/gallium/drivers/nouveau/nvc0/nvc0_program.c| 2 +-
Review comments sent; you should also add a separate patch that marks
off ARB_viewport_array in GL3.txt and adds it to relnotes for 10.3.
On Sat, Jun 14, 2014 at 10:41 AM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
This patch-series implements the ARB_viewport_array for nvc0
I've made a few small fixes to this -- you forget to set the
scissors/viewports dirty to ~0 on context switch, and also marking the
first scissor dirty after a 3d blit (which I was forgetting to do on
nv50 as well... oops). I'll push this out shortly with my
modifications.
Thanks for the
Not sure what you did with these patches, but the spacing is all
off... makes them hard to read (for me) and also they won't apply for
testing. Mind regenerating them? Perhaps you were doing a 2-way merge?
On Mon, Jun 16, 2014 at 12:00 PM, Maarten Lankhorst
maarten.lankho...@canonical.com wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 112 +++--
1 file changed, 51 insertions(+), 61 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 124 -
1 file changed, 57 insertions(+), 67 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
Commit ad4dc772 fixed an issue with the viewport not being restored
correctly. However it's rather hackish and confusing. Instead just mark
the viewport dirty and let the viewport validation take care of it.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nvc0
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/nv30/nv30_screen.c | 6 ++
src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c | 1 +
2 files changed, 7 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nv30
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_context.c
b/src/gallium/drivers/nouveau/nv30/nv30_context.c
This is just a hack, it should be possible to create a temporary zeta
surface and render to that instead. However that's more complicated and
this avoids the render being entirely broken and errors being reported
by the card.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 mesa-sta
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nv30/nv30_screen.c | 33 +-
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
---
man/nouveau.man | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/man/nouveau.man b/man/nouveau.man
index 7c72907..a8dfacd 100644
--- a/man/nouveau.man
+++ b/man/nouveau.man
@@ -13,7 +13,7 @@ nouveau \- NVIDIA video driver
.fi
.SH DESCRIPTION
the nouveau_device that it is the owner of the
fd so that it will be closed on destruction.
Also make sure to free the nouveau_device in case of any failure.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79823
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/winsys/nouveau/drm
the nouveau_device that it is the owner of the
fd so that it will be closed on destruction.
Also make sure to free the nouveau_device in case of any failure.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79823
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 mesa-sta
On Mon, Jun 23, 2014 at 11:24 AM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Please add a brief description of what your change does and how it
achieves this. [Let me know if you're not comfortable writing that,
and I can compose it for you.]
Among other things, note that it
On Mon, Jun 23, 2014 at 2:15 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
previously, if we had something like:
gl_ViewportIndex = idx;
for(int i = 0; i gl_in.length(); i++) {
gl_Position = gl_in[i].gl_Position;
EmitVertex();
}
EndPrimitive();
we failed to set
On Mon, Jun 23, 2014 at 5:01 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
previously, if we had something like:
gl_ViewportIndex = idx;
for(int i = 0; i gl_in.length(); i++) {
gl_Position = gl_in[i].gl_Position;
EmitVertex();
}
EndPrimitive();
we failed to set
tobias.johannes.klausm...@mni.thm.de
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.1 10.2 mesa-sta...@lists.freedesktop.org
Hi Tobias and Ilia,
This patch isn't picking cleanly over to the 10.1 branch.
Can you give me some guidance here? Either of the following replies
would be great:
Don't
The hardware allows multiple simultaneous renders with the same
memory-backed constbufs but with each invocation having different
values. However in order for that to work, the data has to be streamed
in via the right constbuf slot. We weren't doing that for UBOs.
Signed-off-by: Ilia Mirkin imir
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 22 +++-
src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 2 ++
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 5 +
src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c | 27
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nv50/nv50_context.c | 22 ++-
src/gallium/drivers/nouveau/nv50/nv50_context.h | 1 +
src/gallium/drivers/nouveau/nv50/nv50_vbo.c | 29 -
3 files changed, 50 insertions
Hello,
A user (cc'd) reported that nouveau's enabling of MSI causes the card
to not work on his setup [1]. I think the situation is that MSI is
just not supported by the underlying motherboard, even though the
card, and probably bridge, support it just fine. It's a very old
board. The nouveau
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Based on a recent discussion in #radeon, and also my own observation that the
'full' scaling causes no end of confusion among users.
See https://bugs.freedesktop.org/show_bug.cgi?id=80868 for some more details,
although it is more radeon
On Thu, Jul 3, 2014 at 8:27 PM, Ben Skeggs skeg...@gmail.com wrote:
On Fri, Jul 4, 2014 at 5:27 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Based on a recent discussion in #radeon, and also my own observation that the
'full' scaling causes
mailto:wangyij...@huawei.com wrote:
On 2014/7/3 11:20, Ilia Mirkin wrote:
Hello,
A user (cc'd) reported that nouveau's enabling of MSI causes the card
to not work on his setup [1]. I think the situation is that MSI is
just not supported by the underlying motherboard, even
On Thu, Jul 3, 2014 at 11:09 PM, Yijing Wang wangyij...@huawei.com wrote:
On 2014/7/4 10:43, Ilia Mirkin wrote:
On Thu, Jul 3, 2014 at 10:35 PM, Yijing Wang wangyij...@huawei.com wrote:
Hi Brian,
From your 01:00.0 VGA compatible controller PCI config register, it
supports 1 MSI vector, so
On Thu, Jul 3, 2014 at 11:56 PM, Yijing Wang wangyij...@huawei.com wrote:
On 2014/7/4 11:30, Ilia Mirkin wrote:
On Thu, Jul 3, 2014 at 11:09 PM, Yijing Wang wangyij...@huawei.com wrote:
On 2014/7/4 10:43, Ilia Mirkin wrote:
On Thu, Jul 3, 2014 at 10:35 PM, Yijing Wang wangyij...@huawei.com
This can only happen with texture(samplerCubeShadow, bias), where the
compare will be in the first argument.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 +-
1 file changed, 1 insertion
Unfortunately there's no good way to do this on the nv50 shader isa.
Dropping the bias seems preferable to doing the compare post-filtering.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
handleTEX moves the layer as the first argument. This makes sure that
the quadops deal with the texture coordinates.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 5 +++--
1 file changed
Apparently TXD wants its offset differently than TEX, accepting it in
the upper bits of the layer index. Unclear what happens when this is
combined with indirect sampler indexing.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 47
Something about how we're implementing offsets for TXD is wrong, just
flip to the generic quadop-based implementation in that case.
This is the minimal fix appropriate for backporting.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers
On Sat, Jul 5, 2014 at 7:30 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Folding for conversions: F32/64-(U16/32, S16/32) and (U16/32, S16/32)-F32
No piglit regressions observed on nv50 and nvc0!
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
V2:
On Mon, Jul 7, 2014 at 10:19 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
This shortens runtime of piglit test fp-long-alu to ~22s
No piglit regressions observed on nvc0!
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
This is great. I'm going to run
nouveau_fence_update does real work unconditionally. Avoid doing that if
the fence we're checking on has already been signalled.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nouveau_fence.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium
From: Christoph Bumiller e0425...@student.tuwien.ac.at
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
docs/GL3.txt | 5 +-
docs/relnotes/10.3.html| 1 +
src/gallium/drivers/nouveau/nouveau_screen.c | 6 +-
src/gallium
From: Christoph Bumiller e0425...@student.tuwien.ac.at
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
.../drivers/nouveau/nvc0/nvc0_vbo_translate.c | 41 +++---
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0
nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS
Ilia Mirkin (1):
nouveau: check if a fence has already been signalled
docs/GL3.txt | 5 +-
docs/relnotes/10.3.html| 1 +
src/gallium/drivers/nouveau/nouveau_fence.c
On Thu, Jul 10, 2014 at 11:01 AM, Lampshade lampsh...@poczta.fm wrote:
Hello
in dmesg I always have these informations (I tested several kernels between
3.7 and 3.16-rc3):
[ 13.742006] nouveau E[ DRM] Pointer to TMDS table invalid
[ 13.742036] nouveau [ DRM] DCB version 4.0
[
---
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +
src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp | 8 ++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
I noticed this in a review of the code trying to figure out why the next
problem was happening. This doesn't actually fix anything, but there's no
reason why phi nodes must be restricted to 32-bit registers. (Although they
are, for now.)
src
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: mesa-sta...@lists.freedesktop.org
---
Was getting weird shader errors in dmat4*dmat4 which spilled one double-wide
register (i.e. size 8). envytools docs apparently list this as having to be
aligned to 0x10, and this indeed fixes it.
src
wanted to comment. They do not depend on the preliminary core fp64
work.
Ilia Mirkin (5):
nvc0: make sure that the local memory allocation is aligned to 0x10
nv50/ir: keep track of whether the program uses fp64
nvc0: mark shader header if fp64 is used
nv50/ir: fix hard-coded TYPE_U32 sized
register value.
This maintains the invariant that a phi node's defs and sources are
allocated the same register.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
I _think_ that the split case might also need this, in case there's a split
that feeds into phi nodes, and those phi nodes are never
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index c624e21..ce0207a 100644
--- a/src
On Wed, Jul 23, 2014 at 10:32 AM, Clemens Eisserer linuxhi...@gmail.com wrote:
Hi again,
On my NV18 based laptop I experience artifacts related to text
(however, 2D performance is really great these days):
- With grayscale AA text is sometimes missing, often visible on the XFCE
desktop
-
On Wed, Jul 23, 2014 at 10:52 AM, Patrick Baggett
baggett.patr...@gmail.com wrote:
On Wed, Jul 23, 2014 at 9:41 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
On Wed, Jul 23, 2014 at 10:32 AM, Clemens Eisserer linuxhi...@gmail.com
wrote:
Hi again,
On my NV18 based laptop I experience
What warning with what compiler? Pretty sure this builds cleanly for me.
On Jul 25, 2014 11:37 AM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
You probably want the drm-nouveau-next branch. Unfortunately master
does not appear to get updated anymore.
You can also attempt to build the very latest and greatest, which is
at http://cgit.freedesktop.org/~darktama/nouveau, although it will
only build against the latest kernels (usually).
On
On Thu, Aug 7, 2014 at 8:30 AM, Pavel Roskin pro...@gnu.org wrote:
Hello!
I've installed Fedora 20 Mate i386 on an old system with GeForce4 Ti 4200
AGP (NV25) and I see significant visual defects. Many icons are not shown.
They can reappear if they are selected of the mouse goes over them.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 34 +-
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp| 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 25 ++
1 file changed, 25 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 47cf0ef..6b75a9e 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -461,7 +461,7 @@ setup_render_target(NVPtr pNv
The higher 0x800 was getting overwritten by the 0x7ff anyways, so it
wasn't doing any good. The mesa driver just uses 0x800 for the low
portion and doesn't set the 8 bit in the higher portion, so do the same
thing here.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 4
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index df2f561..47cf0ef 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -520,7 +520,7 @@ setup_picture(NVPtr pNv, PicturePtr
Doesn't actually end up mattering.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nv10_exa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 6b75a9e..78bc739 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -132,7 +132,7
On Thu, Aug 7, 2014 at 3:40 PM, Pavel Roskin pro...@gnu.org wrote:
Quoting Ilia Mirkin imir...@alum.mit.edu:
On Thu, Aug 7, 2014 at 8:30 AM, Pavel Roskin pro...@gnu.org wrote:
Hello!
I've installed Fedora 20 Mate i386 on an old system with GeForce4 Ti 4200
AGP (NV25) and I see significant
Hello,
I'm trying to debug why fbo-copyteximage-simple is failing, and I'm...
failing. It's an extremely simple test. I'm pretty sure that the
copyteximage part of it has nothing to do with the failure, at least
it behaves identically when I just return tex instead of copiex_tex.
Without any
On Mon, Aug 11, 2014 at 5:01 PM, Pavel Roskin pro...@gnu.org wrote:
Quoting Ilia Mirkin imir...@alum.mit.edu:
http://lists.freedesktop.org/archives/nouveau/2014-August/018270.html
http://lists.freedesktop.org/archives/nouveau/2014-August/018271.html
Please see if these help your issue
Please send these one email per patch, inlined. git send-email will
generally do the right thing, but you can do it manually too (just be
careful about preserving tabs, not wrapping, etc... most mail clients
mess it up one way or another)
On Mon, Aug 11, 2014 at 7:03 PM, Joel Holdsworth
As you've no doubt noticed, using magic numbers is the convention
used throughout the driver (except dispnv04 which is in a world of its
own), rather than the (occasional) macros. It's a trade-off, since the
magic numbers are a little harder to read, but they're much easier to
match up in traces.
any ideas, let me know.
On Sun, Aug 10, 2014 at 7:32 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Hello,
I'm trying to debug why fbo-copyteximage-simple is failing, and I'm...
failing. It's an extremely simple test. I'm pretty sure that the
copyteximage part of it has nothing to do
the vertices used for the blit...)
I'll keep looking at this, but if anyone has any ideas, let me know.
On Sun, Aug 10, 2014 at 7:32 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Hello,
I'm trying to debug why fbo-copyteximage-simple is failing, and I'm...
failing. It's an extremely simple test. I'm
On Thu, Aug 21, 2014 at 7:45 AM, Roy Spliet rspl...@eclipso.eu wrote:
Signed-off-by: Roy Spliet rspl...@eclipso.eu
---
.../gpu/drm/nouveau/core/include/subdev/clock.h| 3 ++
drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 45
++
On Mon, Aug 25, 2014 at 2:58 PM, Christian Costa titan.co...@gmail.com wrote:
---
nvbios/info.c | 4
1 file changed, 4 insertions(+)
diff --git a/nvbios/info.c b/nvbios/info.c
index 87a33d8..6b8d209 100644
--- a/nvbios/info.c
+++ b/nvbios/info.c
@@ -119,6 +119,10 @@ int
tobias.johannes.klausm...@mni.thm.de
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 32 +-
.../nouveau/codegen/nv50_ir_lowering_nvc0.h| 5 +++-
2 files changed, 29
Samplers are only defined up to num_samplers, so set all samplers above
nr to NULL so that we don't try to read them again later.
Tested-by: Christian Ruppert id...@qasl.de
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers
On Sat, Aug 30, 2014 at 7:30 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
On 30/08/14 23:02, Ilia Mirkin wrote:
Samplers are only defined up to num_samplers, so set all samplers above
nr to NULL so that we don't try to read them again later.
Would it be worth doing a similar thing
-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
b/src/gallium/drivers/nouveau/codegen
The mt address is about to be used more, make sure it's set
appropriately.
Reported-by: Emil Velikov emil.l.veli...@gmail.com
Tested-by: Emil Velikov emil.l.veli...@gmail.com
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers
The current code... makes no sense. Use nouveau_bo_ref to attach the bo
to the exposed resource so as to have the proper lifetime guarantees.
Tested-by: Emil Velikov emil.l.veli...@gmail.com
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src
with VDPAU.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82255
Tested-by: Emil Velikov emil.l.veli...@gmail.com
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 4 ++--
src/gallium/drivers
Hi Maarten,
I'm seeing these prints, which feel like they're accompanied by bad frames:
0x7f7fcb29ab70 is not a real ref: -0.011 72712/72709 0% 35% 1.0% 0 0
This comes from
if (dec-refs[idx].vidbuf != refs[i]) {
debug_printf(%p is not a real ref\n, refs[i]);
// FIXME:
On Tue, Sep 2, 2014 at 2:27 PM, thirstygnome thirstygn...@gmail.com wrote:
I have a Lenovo y510p laptop that has two 755's in sli. It seems at this
time Nvidia does not have support for SLI on Linux. Do you support this with
the 755m card? If so please provide me with a link for instructions.
On Thu, Sep 4, 2014 at 8:37 AM, asd a...@marian1000.go.ro wrote:
Hi
For NV40 attach one patch which leave unused second channel used on
NV50 and more.
What exactly are you saying is being leaked? What problem is your
patch trying to solve?
-ilia
This should probably be folded into the previous patch to avoid
breaking bisectability on nve0
On Thu, Sep 4, 2014 at 10:58 AM, Roy Spliet rspl...@eclipso.eu wrote:
This used to be done implicitly
Signed-off-by: Roy Spliet rspl...@eclipso.eu
---
Only the NVA3/5/8/F tesla chips have a copy engine. Don't bother trying
to create one on earlier tesla chips (and thus printing an error on
failure).
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/nouveau_copy.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/nouveau_copy.c
On Tue, Sep 9, 2014 at 3:08 PM, pete nikolic pg.nikol...@gmail.com wrote:
Hi Folks
Getting a considerable number of these showing up at the moment
[ 619.350185] nouveau :01:00.0: Direct firmware load failed with error -2
[ 619.350193] nouveau :01:00.0: Falling back to user
What problem are you trying to solve? Perhaps you can start by
describing the symptoms, providing logs, etc?
On Sat, Sep 13, 2014 at 11:24 AM, asd a...@marian1000.go.ro wrote:
Hi
On NV_40 on driver is sent instructions from NVE0 series
not right
I inspected register 9012c with nvtools
and
On Sat, Sep 13, 2014 at 4:52 PM, poma pomidorabelis...@gmail.com wrote:
On 13.09.2014 07:02, poma wrote:
On 13.09.2014 06:57, poma wrote:
Actually I have nothing to show cause logs are all OK.
Haha, it seems to me that the bugs become intelligent.
3.15.10-201.fc20.x86_64
On Sat, Sep 13, 2014 at 5:25 PM, poma pomidorabelis...@gmail.com wrote:
On 13.09.2014 22:58, Ilia Mirkin wrote:
On Sat, Sep 13, 2014 at 4:52 PM, poma pomidorabelis...@gmail.com wrote:
On 13.09.2014 07:02, poma wrote:
On 13.09.2014 06:57, poma wrote:
Actually I have nothing to show cause logs
mesa_texstore expects pixel data, not compressed data. For compressed
textures, we want to just copy the bits in without any conversion.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/mesa/drivers/dri/nouveau/nouveau_texture.c | 65 --
1 file changed, 52
On Sun, Sep 14, 2014 at 3:37 AM, Francisco Jerez curroje...@riseup.net wrote:
Ilia Mirkin imir...@alum.mit.edu writes:
mesa_texstore expects pixel data, not compressed data. For compressed
textures, we want to just copy the bits in without any conversion.
Any reason we cannot use
On Mon, Sep 15, 2014 at 4:23 AM, poma pomidorabelis...@gmail.com wrote:
Chipset: G98 (NV98)
Family : NV50
WORKING VIDEO RESUME(S3)
3.15.0-rc8.1.git.7a014a8
3.15.0-rc8.2.git.456b057
3.15.0-rc8.3.git.b8407c9
3.15.0-rc8.4.git.bb7ef1e
BROKEN VIDEO RESUME(S3)
On Mon, Sep 15, 2014 at 1:28 PM, poma pomidorabelis...@gmail.com wrote:
On 15.09.2014 15:36, Ilia Mirkin wrote:
On Mon, Sep 15, 2014 at 4:23 AM, poma pomidorabelis...@gmail.com wrote:
Chipset: G98 (NV98)
Family : NV50
WORKING VIDEO RESUME(S3)
3.15.0-rc8.1.git.7a014a8
3.15.0-rc8.2.git
On Thu, Sep 18, 2014 at 10:07 AM, Ortwin Glück o...@odi.ch wrote:
Hi,
Since 3.16 an external monitor stays dark after resume from sleep. I didn't
manage to activate it
again with xrand. According to xrandr it is connected and configured with a
mode, but I get no signal.
Happens since
There were reports of issues with gallium-nine. It's unclear whether mesa/st
uses these, the patches did not produce any piglit changes. However they seem
right...
Ilia Mirkin (2):
nv50,nvc0: add missing depth/stencil formats to tile flag selection
nv50,nvc0: fix 3d blit logic for odd depth
301 - 400 of 1335 matches
Mail list logo
