On Tue, Jul 14, 2015 at 3:45 AM, Andrew Chew ac...@nvidia.com wrote:
I apologize for my ignorance. In digging through nouveau, I've become
a bit confused regarding the relationship between virtual address
allocations and nouveau bo's.
From my reading of the code, it seems that a nouveau_bo
I apologize for my ignorance. In digging through nouveau, I've become
a bit confused regarding the relationship between virtual address
allocations and nouveau bo's.
From my reading of the code, it seems that a nouveau_bo really
encapsulates a buffer (whether imported, or allocated within
On Tue, Jul 7, 2015 at 8:27 PM, Jerome Glisse j.gli...@gmail.com wrote:
On Tue, Jul 07, 2015 at 11:29:38AM -0400, Ilia Mirkin wrote:
On Mon, Jul 6, 2015 at 8:42 PM, Andrew Chew ac...@nvidia.com wrote:
Hello,
I am currently looking into ways to support fixed virtual address
allocations
responding to this bit of text from ben below:
I guess you can probably use the start of the kernel's address space
carveout for these kind of mappings actually? It's not like userspace
can ever have virtual addresses there?
one of the salient points of how we implement gr and compute setup
On Wed, Jul 08, 2015 at 10:51:55AM +1000, Ben Skeggs wrote:
On 8 July 2015 at 10:47, Andrew Chew ac...@nvidia.com wrote:
On Wed, Jul 08, 2015 at 10:37:34AM +1000, Ben Skeggs wrote:
On 8 July 2015 at 10:31, Andrew Chew ac...@nvidia.com wrote:
On Wed, Jul 08, 2015 at 10:18:36AM +1000, Ben
On Tue, Jul 07, 2015 at 11:29:38AM -0400, Ilia Mirkin wrote:
On Mon, Jul 6, 2015 at 8:42 PM, Andrew Chew ac...@nvidia.com wrote:
Hello,
I am currently looking into ways to support fixed virtual address
allocations
and sparse mappings in nouveau, as a step towards supporting CUDA.
On Tue, Jul 07, 2015 at 11:29:38AM -0400, Ilia Mirkin wrote:
On Mon, Jul 6, 2015 at 8:42 PM, Andrew Chew ac...@nvidia.com wrote:
These ioctls just call into the allocator to allocate a range of addresses,
resulting in a struct nvkm_vma that tracks that allocation (or releases the
struct
On Mon, Jul 6, 2015 at 8:42 PM, Andrew Chew ac...@nvidia.com wrote:
Hello,
I am currently looking into ways to support fixed virtual address allocations
and sparse mappings in nouveau, as a step towards supporting CUDA.
CUDA requires that the GPU virtual address for a given buffer match the
On 8 July 2015 at 10:15, Andrew Chew ac...@nvidia.com wrote:
On Tue, Jul 07, 2015 at 08:13:28PM -0400, Ilia Mirkin wrote:
On Tue, Jul 7, 2015 at 8:11 PM, C Bergström cbergst...@pathscale.com wrote:
On Wed, Jul 8, 2015 at 7:08 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
On Tue, Jul 7, 2015 at
On Wed, Jul 08, 2015 at 10:18:36AM +1000, Ben Skeggs wrote:
There's some minimal state that needs to be mapped into GPU address space.
One thing that comes to mind are pushbuffers, which are needed to submit
stuff to any engine.
I guess you can probably use the start of the kernel's address
On 8 July 2015 at 10:31, Andrew Chew ac...@nvidia.com wrote:
On Wed, Jul 08, 2015 at 10:18:36AM +1000, Ben Skeggs wrote:
There's some minimal state that needs to be mapped into GPU address space.
One thing that comes to mind are pushbuffers, which are needed to submit
stuff to any engine.
regarding
Fixed address allocations weren't going to be part of that, but I see
that it makes sense for a variety of use cases. One question I have
here is how this is intended to work where the RM needs to make some
of these allocations itself (for graphics context mapping, etc), how
On 8 July 2015 at 09:53, C Bergström cbergst...@pathscale.com wrote:
regarding
Fixed address allocations weren't going to be part of that, but I see
that it makes sense for a variety of use cases. One question I have
here is how this is intended to work where the RM needs to make
On Wed, Jul 8, 2015 at 6:58 AM, Ben Skeggs skeg...@gmail.com wrote:
On 8 July 2015 at 09:53, C Bergström cbergst...@pathscale.com wrote:
regarding
Fixed address allocations weren't going to be part of that, but I see
that it makes sense for a variety of use cases. One question I
On Tue, Jul 7, 2015 at 8:07 PM, C Bergström cbergst...@pathscale.com wrote:
On Wed, Jul 8, 2015 at 6:58 AM, Ben Skeggs skeg...@gmail.com wrote:
On 8 July 2015 at 09:53, C Bergström cbergst...@pathscale.com wrote:
regarding
Fixed address allocations weren't going to be part of that,
On Wed, Jul 08, 2015 at 10:37:34AM +1000, Ben Skeggs wrote:
On 8 July 2015 at 10:31, Andrew Chew ac...@nvidia.com wrote:
On Wed, Jul 08, 2015 at 10:18:36AM +1000, Ben Skeggs wrote:
There's some minimal state that needs to be mapped into GPU address
space.
One thing that comes to mind
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