2] [] fb_notifier_call_chain+0x1b/0x20
> [ 18.984344] [] register_framebuffer+0x251/0x330
> [ 18.984347] [] ?
> vga_switcheroo_client_fb_set+0x5d/0x70
> [ 18.984349] []
> drm_fb_helper_initial_config+0x25f/0x3f0
> [ 18.984388] []
> intel_fbdev_initial_config+0x18/0x30 [i91
On Sun, Feb 11, 2018 at 10:38:28AM +0100, Lukas Wunner wrote:
> [...]
> i915, malidp and msm "solved" this issue by not stopping the poll worker
> on runtime suspend. But this results in the GPU bouncing back and forth
> between D0 and D3 continuously. That's a total no-go for GPUs which
>
On Wed, Aug 19, 2020 at 05:34:15PM -0400, Lyude Paul wrote:
> (adding Ville and Imre to the cc here, they might be interested to know about
> this, comments down below)
>
> On Wed, 2020-08-19 at 11:15 -0400, Sean Paul wrote:
> > On Tue, Aug 11, 2020 at 04:04:50PM -0400, Lyude Paul wrote:
> > >
On Fri, Aug 21, 2020 at 01:43:39PM -0400, Lyude Paul wrote:
> [...]
> > The wording is a bit unclear, but as I understand the Standard only
> > calls for the above:
> >
> > """
> > A DP upstream device shall read the capability from DPCD Addresses 00080h
> > through 00083h. A DP Branch device
