[Nouveau] [PATCH] perfmon: do not forget to destroy the engine context

This fixes a crash when we reload Nouveau DRM. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- nvkm/engine/perfmon/base.c | 1 + 1 file changed, 1 insertion(+) diff --git a/nvkm/engine/perfmon/base.c b/nvkm/engine/perfmon/base.c index e9c5e51..7481003 100644 --- a/nvkm/engine

[Nouveau] Prepare the way for performance counters in perfmon

Hi folks, This set of patches is just for clearing the way before introducing the infrastructure for performance counters in perfmon. I'll try to publish a new version of my kernel interface based on nvif in a couple of days. See you. ___ Nouveau

[Nouveau] [PATCH 3/3] perfmon: remove PDAEMON signals

As discussed with Martin Peres, PDAEMON signals should be exposed through sysfs and not managed by the perfmon engine which is only used for performance counters. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/Kbuild | 1 - drm/core/engine/perfmon

[Nouveau] [PATCH 2/3] perfmon: remove unused nouveau_perfsig_wrap() function

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- nvkm/engine/perfmon/base.c | 20 nvkm/engine/perfmon/priv.h | 3 --- 2 files changed, 23 deletions(-) diff --git a/nvkm/engine/perfmon/base.c b/nvkm/engine/perfmon/base.c index 5fa45e1..b74734e 100644 --- a/nvkm

[Nouveau] [PATCH 1/3] lib: fix devices selection using -a

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- lib/kern.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/kern.c b/lib/kern.c index 930cd35..7e8f3e9 100644 --- a/lib/kern.c +++ b/lib/kern.c @@ -173,7 +173,7 @@ drm_client_init(const char *name, u64 device

Re: [Nouveau] [RFC PATCH 2/3] dvfs: add support for GK20A

On 12/18/2014 11:25 AM, Ben Skeggs wrote: On Thu, Dec 18, 2014 at 8:13 PM, Vince Hsu vin...@nvidia.com wrote: Hello Ben, On 12/18/2014 05:34 PM, Ben Skeggs wrote: On Thu, Dec 18, 2014 at 4:28 PM, Vince Hsu vin...@nvidia.com wrote: This patch creates a subdev for DVFS (Dynamic Voltage and

Re: [Nouveau] [PATCH 2/2] pm: fix a potential race condition when creating an engine context

* bump * Ben, could you take a look at the series ? On 04/14/2015 10:43 PM, Samuel Pitoiset wrote: There is always the possiblity that the ppm-context pointer would get partially updated and accidentally would equal ctx. This would allow two contexts to co-exist, which is not acceptable

[Nouveau] [PATCH 1/2] pm: prevent freeing the wrong engine context

This fixes a crash when multiple PM engine contexts are created. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com Reviewed-by: Martin Peres martin.pe...@free.fr --- drm/nouveau/nvkm/engine/pm/base.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drm/nouveau

[Nouveau] [PATCH 2/2] pm: fix a potential race condition when creating an engine context

There is always the possiblity that the ppm-context pointer would get partially updated and accidentally would equal ctx. This would allow two contexts to co-exist, which is not acceptable. Moving the test to the critical section takes care of this problem. Signed-off-by: Samuel Pitoiset

Re: [Nouveau] [Mesa-dev] [PATCH] nv50: allocate more offset space for occlusion queries

Reviewed-by: Samuel Pitoiset samuel.pitoi...@gmail.com But please, fix the comment in the nv50_query struct, now it is /* base + i * 32 */. On 04/04/2015 06:00 AM, Ilia Mirkin wrote: Commit 1a170980a09 started writing to q-data[4]/[5] but kept the per-query space at 16, which meant

Re: [Nouveau] [PATCH] fix a wrong use of a logical operator in drmmode_output_dpms()

play with it... On Wed, May 20, 2015 at 1:11 PM, Tobias Klausmann tobias.johannes.klausm...@mni.thm.de wrote: looks good to me! :) Feel free to add my R-b. On 20.05.2015 17:08, Samuel Pitoiset wrote: This is probably a typo error which has been introduced in 2009... This fixes the following

[Nouveau] [PATCH RFC 19/20] sw/nv50: add some private functions to factorize code

These functions will be also used by the interface for controlling performance counters. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/sw/nv50.c | 56 ++- 1 file changed, 38 insertions(+), 18 deletions(-) diff --git

[Nouveau] [PATCH RFC 09/20] pm: change signal iter to u16

16 bits is large enough to store the maximum number of signals available for one domain (i.e. 256). Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- bin/nv_perfmon.c | 4 ++-- drm/nouveau/include/nvif/class.h | 7 --- drm/nouveau/nvkm/engine/pm/base.c | 10

[Nouveau] [PATCH RFC 17/20] pm: allow the userspace to configure sources

Signed-off-by: Samuel Pitoiset samuel.pitoiset at gmail.com --- drm/nouveau/include/nvif/class.h | 1 + drm/nouveau/nvkm/engine/pm/base.c | 102 ++ drm/nouveau/nvkm/engine/pm/priv.h | 2 + 3 files changed, 95 insertions(+), 10 deletions(-) diff --git

[Nouveau] [PATCH RFC 13/20] pm: allow to query the number of sources for a signal

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/include/nvif/class.h | 3 ++- drm/nouveau/nvkm/engine/pm/base.c | 22 +++--- 2 files changed, 21 insertions(+), 4 deletions(-) diff --git a/drm/nouveau/include/nvif/class.h b/drm/nouveau/include/nvif

[Nouveau] [PATCH RFC 14/20] pm: implement NVIF_PERFMON_V0_QUERY_SOURCE method

This allows to query the ID, the mask and the user-readable name of sources for each signal. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/include/nvif/class.h | 12 ++ drm/nouveau/nvkm/engine/pm/base.c | 77 +++ 2 files changed

[Nouveau] [PATCH RFC 15/20] pm: allow the userspace to schedule hardware counters

nv_perfmon but this is going to be fixed with the upcoming patch. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/include/nvif/class.h | 8 +++-- drm/nouveau/nvkm/engine/pm/base.c | 64 +-- drm/nouveau/nvkm/engine/pm/priv.h | 1 + 3 files

[Nouveau] [PATCH RFC 05/20] pm: reorganize the nvif interface

This commit introduces the NVIF_IOCTL_NEW_V0_PERFMON class which will be used in order to query domains, signals and sources. This separates the querying and the counting interface. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- bin/nv_perfmon.c | 12

[Nouveau] [PATCH RFC 08/20] pm: allow to query signals by domain

This will allow to configure performance counters with hardware signal indexes instead of user-readable names in an upcoming patch. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- bin/nv_perfmon.c | 185 -- drm/nouveau/include

[Nouveau] [PATCH RFC 07/20] pm: implement NVIF_PERFMON_V0_QUERY_DOMAIN method

This allows to query the number of available domains, including the number of hardware counter and the number of signals per domain. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/include/nvif/class.h | 11 - drm/nouveau/nvkm/engine/pm/base.c | 86

[Nouveau] [PATCH RFC 03/20] pm: remove pmu signals

PDAEMON signals don't have to be exposed by the perfmon engine. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com Reviewed-by: Martin Peres martin.pe...@free.fr --- drm/nouveau/include/nvkm/engine/pm.h | 4 -- drm/nouveau/nvkm/engine/pm/Kbuild| 1 - drm/nouveau/nvkm/engine/pm

[Nouveau] [PATCH RFC 20/20] sw/nv50: add and interface for controlling performance counters

This software methods interface will allow the userspace to tie monitoring of performance counters to the command stream. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/sw/nv50.c | 160 ++ drm/nouveau/nvkm/engine/sw/nv50.h

[Nouveau] [PATCH RFC 18/20] pm/nv50: add compute and graphics signals/sources

These signals and sources have been reverse engineered from NVIDIA PerfKit (Windows) and CUPTI (Linux), they will be used to build complex hardware events from the userspace. This commit also adds a new class for GT200. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau

[Nouveau] [PATCH RFC 12/20] pm: add concept of sources

From: Samuel Pitoiset samuel.pitoisetœgmail.com A source (or multiplexer) is a tuple addr+mask+shift which allows to control a block of signals. The maximum number of sources that a signal can define is arbitrary limited to 8 and this should be large enough. This patch allows to define multi

[Nouveau] [PATCH RFC 16/20] pm: allow to configure domains instead of simple counters

a domain instead of separate counters. This has the advantage to move all of the logic to the userspace. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- bin/nv_perfmon.c | 193 ++ drm/nouveau/include/nvif/class.h | 30 +++--- drm/nouveau

[Nouveau] [PATCH RFC 01/20] pm: prevent freeing the wrong engine context

This fixes a crash when multiple PM engine contexts are created. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com Reviewed-by: Martin Peres martin.pe...@free.fr --- drm/nouveau/nvkm/engine/pm/base.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drm/nouveau

[Nouveau] [PATCH RFC 00/20] expose global performance counters

/sources Patches 19-20: expose a software methods interface for controlling PM Feel free to make a review. Thanks in advance! Samuel Pitoiset (20): pm: prevent freeing the wrong engine context pm: fix a potential race condition when creating an engine context pm: remove pmu signals pm

[Nouveau] [PATCH RFC 02/20] pm: fix a potential race condition when creating an engine context

There is always the possiblity that the ppm-context pointer would get partially updated and accidentally would equal ctx. This would allow two contexts to co-exist, which is not acceptable. Moving the test to the critical section takes care of this problem. Signed-off-by: Samuel Pitoiset

[Nouveau] [PATCH RFC 06/20] pm: prevent creating a perfctr object when signals are not found

Since a new class has been introduced to query signals, we can now return an error when the userspace wants to monitor unknown signals. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/pm/base.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff

[Nouveau] [PATCH RFC 04/20] pm: remove unused nvkm_perfsig_wrap() function

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com Reviewed-by: Martin Peres martin.pe...@free.fr --- drm/nouveau/nvkm/engine/pm/base.c | 20 drm/nouveau/nvkm/engine/pm/priv.h | 4 2 files changed, 24 deletions(-) diff --git a/drm/nouveau/nvkm/engine/pm/base.c b

[Nouveau] [PATCH RFC 10/20] pm: use hardware signals indexes instead of user-readable names

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- bin/nv_perfmon.c | 6 +++-- drm/nouveau/include/nvif/class.h | 11 ++--- drm/nouveau/nvkm/engine/pm/base.c | 52 +-- 3 files changed, 23 insertions(+), 46 deletions(-) diff

[Nouveau] [PATCH RFC 11/20] pm: allow to monitor hardware signal index 0x00

This signal index must be always allowed even if it's not clearly defined in a domain in order to monitor a counter like 0x03020100 because it's the default value of signals. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/pm/base.c | 4 ++-- drm/nouveau

[Nouveau] [RFC 2/3] util: add LIST_MOVE_TAIL to list.h

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/util/list.h | 9 + 1 file changed, 9 insertions(+) diff --git a/src/util/list.h b/src/util/list.h index fb566f5..c782ef5 100644 --- a/src/util/list.h +++ b/src/util/list.h @@ -116,12 +116,21 @@ static inline void

[Nouveau] [RFC 1/3] util: move LIST_FIRST_ENTRY from nv30_query.c to list.h

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv30/nv30_query.c | 3 --- src/util/list.h | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv30/nv30_query.c b/src/gallium

[Nouveau] [RFC 3/3] st/perfkit: add a state tracker for NVIDIA PerfKit

/libperfkit/ Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- configure.ac | 30 ++ src/gallium/Makefile.am| 4 + src/gallium/state_trackers/perfkit/Makefile.am | 41 ++ .../state_trackers/perfkit/Makefile.sources

[Nouveau] [RFC 0/3] implement nouveau-perfKit

and libperfkit. Thanks! Samuel Pitoiset (3): util: move LIST_FIRST_ENTRY from nv30_query.c to list.h util: add LIST_MOVE_TAIL to list.h st/perfkit: add a state tracker for NVIDIA PerfKit configure.ac | 30 ++ src/gallium/Makefile.am

Re: [Nouveau] [PATCH RFC 05/20] pm: reorganize the nvif interface

On 06/09/2015 12:02 AM, Ben Skeggs wrote: On 8 June 2015 at 06:40, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: This commit introduces the NVIF_IOCTL_NEW_V0_PERFMON class which will be used in order to query domains, signals and sources. This separates the querying and the counting

[Nouveau] [RFC PATCH 6/8] nv50: add support for compute/graphics global performance counters

later. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_query.c | 1057 +++- src/gallium/drivers/nouveau/nv50/nv50_screen.h | 35 + 2 files changed, 1087 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers

[Nouveau] [RFC PATCH 3/8] nv50: allocate and map a notifier buffer object for PM

in order to prevent stalls when reading queries. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 29 ++ src/gallium/drivers/nouveau/nv50/nv50_screen.h | 6 ++ 2 files changed, 35 insertions(+) diff --git a/src

[Nouveau] [RFC PATCH 7/8] nv50: expose global performance counters to the HUD

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_query.c | 41 ++ src/gallium/drivers/nouveau/nv50/nv50_screen.c | 1 + src/gallium/drivers/nouveau/nv50/nv50_screen.h | 3 ++ 3 files changed, 45 insertions(+) diff --git

[Nouveau] [RFC PATCH 0/8] nv50: expose global performance counters

series which exposes global performance counters for Fermi and Kepler will be submitted once I have got enough reviews for this one. Feel free to make a review. Thanks, Samuel. Samuel Pitoiset (8): nouveau: implement the nvif hardware performance counters interface nv50: allocate a software

[Nouveau] [RFC PATCH 8/8] nv50: enable GL_AMD_performance_monitor

This exposes a group of global performance counters that enables GL_AMD_performance_monitor. All piglit tests are okay. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_query.c | 35 ++ src/gallium/drivers/nouveau/nv50

[Nouveau] [RFC PATCH 5/8] nv50: prevent NULL pointer dereference with pipe_query functions

This may happen when nv50_query_create() fails to create a new query. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_query.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/nv50

[Nouveau] [RFC PATCH 4/8] nv50: configure the ring buffer for reading back PM counters

To write data at the right offset, the kernel has to know some parameters of this ring buffer, like the number of domains and the maximum number of queries. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 7 +++ 1 file changed, 7

[Nouveau] [RFC PATCH 2/8] nv50: allocate a software object class

This will allow to monitor global performance counters through the command stream of the GPU instead of using ioctls. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 11 +++ src/gallium/drivers/nouveau/nv50/nv50_screen.h | 1

Re: [Nouveau] [RFC PATCH 5/8] nv50: prevent NULL pointer dereference with pipe_query functions

, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: This may happen when nv50_query_create() fails to create a new query. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/gallium/drivers/nouveau/nv50/nv50_query.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion

[Nouveau] [PATCH 2/2] pm/nv40: rename pcounter domains to 'pc' instead of 'pm'

This trivial patch makes thing more consistent since hardware signals names are prefixed by 'pcXX'. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/pm/nv40.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/engine/pm/nv40.c

[Nouveau] [PATCH 2/2] pm/gk104: add compute signals/sources

These signals and sources have been reverse engineered from CUPTI (Linux). Graphics signals exposed by PerfKit (Windows only) will be added later. I need to reverse engineer them and it's a bit painful. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/pm/gf100

[Nouveau] [PATCH 1/2] pm/gk104: re-use gf100_pm_ctor()

gk104_pm_ctor() is equal to gf100_pm_ctor(). Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/include/nvkm/engine/pm.h | 2 +- drm/nouveau/nvkm/engine/device/gk104.c | 8 ++--- drm/nouveau/nvkm/engine/pm/gk104.c | 60 +- 3 files

Re: [Nouveau] [Mesa-dev] [RFC PATCH 5/8] nv50: prevent NULL pointer dereference with pipe_query functions

On 06/23/2015 08:57 AM, Michel Dänzer wrote: On 23.06.2015 06:02, Samuel Pitoiset wrote: On 06/22/2015 10:52 PM, Ilia Mirkin wrote: If query_create fails, why would any of these functions get called? Because the HUD doesn't check if query_create() fails and it calls other pipe_query

Re: [Nouveau] [PATCH] fix a wrong use of a logical operator in drmmode_output_dpms()

Pushed. On 05/27/2015 01:23 PM, Samuel Pitoiset wrote: On 05/21/2015 06:40 AM, Dave Airlie wrote: On 21 May 2015 at 03:26, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: On 05/20/2015 07:13 PM, Ilia Mirkin wrote: This is obviously a bug, but one that has been there for some time. Please

[Nouveau] [PATCH 1/2] pm: fix signals/sources for GT200+

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- This patch should be squashed with pm/nv50: add compute and graphics signals/sources. drm/nouveau/nvkm/engine/pm/gt200.c | 8 drm/nouveau/nvkm/engine/pm/gt215.c | 3 +-- 2 files changed, 5 insertions(+), 6 deletions(-) diff

Re: [Nouveau] [PATCH RFC 05/20] pm: reorganize the nvif interface

On 06/14/2015 04:32 AM, Ben Skeggs wrote: On 10 June 2015 at 07:53, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: On 06/09/2015 12:02 AM, Ben Skeggs wrote: On 8 June 2015 at 06:40, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: This commit introduces the NVIF_IOCTL_NEW_V0_PERFMON

[Nouveau] [PATCH 2/2] pm: some fixes related to sources

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- This patch should be squashed with pm: allow the userspace to configure sources. drm/nouveau/nvkm/engine/pm/base.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drm/nouveau/nvkm/engine/pm

[Nouveau] [PATCH 1/2] pm/gf100: allow to share GPC, HUB and PART domains

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/include/nvkm/engine/pm.h | 2 +- drm/nouveau/nvkm/engine/device/gf100.c | 18 +- drm/nouveau/nvkm/engine/pm/gf100.c | 22 +- drm/nouveau/nvkm/engine/pm/gf100.h | 11

[Nouveau] [PATCH 2/2] pm/gf100: add compute signals/sources

These signals and sources have been reverse engineered from CUPTI (Linux). Graphics signals exposed by PerfKit (Windows only) will be added later. I need to reverse engineer them and it's a bit painful. This commit also adds a new class for GF108 and GF117. Signed-off-by: Samuel Pitoiset

Re: [Nouveau] [PATCH] fix a wrong use of a logical operator in drmmode_output_dpms()

On 05/21/2015 06:40 AM, Dave Airlie wrote: On 21 May 2015 at 03:26, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: On 05/20/2015 07:13 PM, Ilia Mirkin wrote: This is obviously a bug, but one that has been there for some time. Please figure out what this is guarding, and confirm

Re: [Nouveau] [RFC PATCH 3/8] nv50: allocate and map a notifier buffer object for PM

On 06/26/2015 01:02 AM, Ilia Mirkin wrote: On Mon, Jun 22, 2015 at 4:53 PM, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: This notifier buffer object will be used to read back global performance counters results written by the kernel. For each domain, we will store the handle

Re: [Nouveau] [RFC PATCH 6/8] nv50: add support for compute/graphics global performance counters

On 06/26/2015 01:09 AM, Ilia Mirkin wrote: What's with the \%'s everywhere? Maybe percent will be better ? On Mon, Jun 22, 2015 at 4:53 PM, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: This commit adds support for both compute and graphics global performance counters which have been

Re: [Nouveau] [RFC PATCH 4/8] nv50: configure the ring buffer for reading back PM counters

, this sounds good to me. On Mon, Jun 22, 2015 at 4:53 PM, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: To write data at the right offset, the kernel has to know some parameters of this ring buffer, like the number of domains and the maximum number of queries. Signed-off-by: Samuel Pitoiset

Re: [Nouveau] [Mesa-dev] [PATCH 2/2] nv30: fix clip plane uploads and enable changes

On 05/24/2015 06:58 AM, Ilia Mirkin wrote: nv30_validate_clip depends on the rasterizer state. Also we should upload all the new clip planes on change since next time the plane data won't have changed, but the enables might. Signed-off-by: Ilia Mirkin imir...@alum.mit.edu ---

Re: [Nouveau] [PATCH 4/8] acpi: Allow evaluate_optimus_dsm to take NULL results

On 05/26/2015 12:22 AM, Pierre Moreau wrote: Signed-off-by: Pierre Moreau pierre.mor...@free.fr --- drm/nouveau/nouveau_acpi.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drm/nouveau/nouveau_acpi.c b/drm/nouveau/nouveau_acpi.c index 36f4a40..073f7d7 100644

Re: [Nouveau] [PATCH 5/8] acpi: Check returned object type by Optimus _DSM locally

On 05/26/2015 12:22 AM, Pierre Moreau wrote: Most _DSM will return an integer value of 0x8002 when given an unknown UUID, revision ID or function ID. Checking locally allows us to differentiate that case from other ACPI errors, and to not report a failed to evaluate _DSM if 0x8002 is

Re: [Nouveau] [PATCH 7/8] acpi: Add support for Apple Gmux _DMS

On 05/26/2015 12:22 AM, Pierre Moreau wrote: Signed-off-by: Pierre Moreau pierre.mor...@free.fr --- drm/nouveau/nouveau_acpi.c | 53 -- drm/nouveau/nouveau_acpi.h | 2 ++ drm/nouveau/nouveau_drm.c | 6 -- drm/nouveau/nouveau_vga.c | 10

[Nouveau] [PATCH] fix a wrong use of a logical operator in drmmode_output_dpms()

-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- src/drmmode_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index 7c1d2bb..161bccd 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c @@ -904,7 +904,7

Re: [Nouveau] [PATCH 8/8] acpi: Use booleans when probing different _DSM types

On 05/26/2015 02:46 PM, Pierre Moreau wrote: I'm thinking of re-writing this patch to just OR the different returned retval and test for individual bits directly in the final conditionals. So this would give something like: int retval = 0; while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA

[Nouveau] [PATCH 1/4] pm: allow zeroed signals to enable sources

Hardware signals index 0x00 are defined for some domains and they have to be allowed to enable sources like the others. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/pm/base.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drm

[Nouveau] [PATCH 1/2] pm/nv50: fix wrong addr for ZCULL source on G80:GT215

Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/pm/nv50.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/engine/pm/nv50.c b/drm/nouveau/nvkm/engine/pm/nv50.c index a778bc7..14d474b 100644 --- a/drm/nouveau/nvkm/engine/pm

[Nouveau] [PATCH 2/2] pm/nv50: TPC[0x3] must be used for PGRAPH muxs on G80

I thought that using TPC[0x0] like for G84:GT215 was sufficient on G80, but it's actually not the case. According to NVIDIA PerfKit on Windows, we have to configure PGRAPH related muxs on TPC[0x3] for this chipset. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm

Re: [Nouveau] [Mesa-dev] [PATCH] nvc0: bind a fake tess control program when there isn't one available

On 07/26/2015 06:56 AM, Ilia Mirkin wrote: Apparently this is necessary in order for tess factors to work in a tess eval program without a tess control program bound. Probably because it uses the fake program's shader header to work out the number of patch constants. Fixes

Re: [Nouveau] [PATCH] nv50: adjust min/max lod by base level on G80

Reviewed-by: Samuel Pitoiset samuel.pitoi...@gmail.com On 07/20/2015 09:26 AM, Ilia Mirkin wrote: Make the assumption that there's a 1:1 TIC - TSC connection, and increase min/max lod by the relevant texture's base level. Also if there's no mipfilter, we have to enable it while forcing min/max

Re: [Nouveau] [Mesa-dev] [PATCH] nvc0: fix geometry program revalidation of clipping params

/listinfo/mesa-dev -- Best regards, Samuel Pitoiset. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau

Re: [Nouveau] [Mesa-dev] [PATCH] nv50: avoid using inline vertex data submit when gl_VertexID is used

be happy to have a look at this second approach. On Mon, Aug 24, 2015 at 4:07 PM, Samuel Pitoiset samuel.pitoi...@gmail.com wrote: Reviewed-by: Samuel Pitoiset samuel.pitoi...@gmail.com This fix is simpler than I was expected. What about the edge flag stuff now? :) On 08/24/2015 05:51 PM, Ilia

Re: [Nouveau] [Mesa-dev] [PATCH] nv50: avoid using inline vertex data submit when gl_VertexID is used

Reviewed-by: Samuel Pitoiset samuel.pitoi...@gmail.com This fix is simpler than I was expected. What about the edge flag stuff now? :) On 08/24/2015 05:51 PM, Ilia Mirkin wrote: The hardware only generates vertexid when vertices come from a VBO. This fixes: vertexid-drawelements

Re: [Nouveau] llvm TGSI backend (WIP) questions

On 11/13/2015 02:46 PM, Hans de Goede wrote: Hi All, Hey Hans, So as discussed I've started working on a TGSI backend for llvm to use as a way to get compute going on nouveau (and other gpu-s). I'm still learning all the ins and outs of llvm so I do not have much to show yet. I've

Re: [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On 10/10/2015 09:42 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote: This patch looks fine except that it should be a bit more normalized. I mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for PUSH_SPACE

Re: [Nouveau] [Mesa-dev] [PATCH] nouveau: avoid emitting new fences unnecessarily

Does this fix those texelFetch piglit tests ? Or is it the second patch ? Anyway, this patch is : Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> On 10/10/2015 08:12 AM, Ilia Mirkin wrote: Right now we emit on every kick, but this is only necessary if something will ever b

Re: [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

This patch looks fine except that it should be a bit more normalized. I mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for PUSH_SPACE calls, sometimes you add it sometimes not. Did you run a full piglit test this time ? :) See my comment below. On 10/10/2015 11:09 AM,

Re: [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On 10/10/2015 09:58 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:55 PM, Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote: On 10/10/2015 09:42 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote: This patch looks

Re: [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On 10/10/2015 10:17 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 4:21 PM, Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote: On 10/10/2015 09:58 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:55 PM, Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote: On 10/10/2015 09:42 PM,

Re: [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

I did a full piglit run on Fermi. There are no regressions and you fixed texelFetch tests and other ones which failed with that assert. I'm lazy to do it on Tesla, so: Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Thanks! On 10/10/2015 11:09 AM, Ilia Mirkin wrote: We stil

Re: [Nouveau] [PATCH] nouveau: make sure there's always room to emit a fence

Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> On 10/05/2015 09:21 PM, Ilia Mirkin wrote: I started seeing a lot of situations on nv30 where fence emission wouldn't fit into the previous buffer (causing assertions). This ensures that whenever checking for space, we always leave

[Nouveau] [PATCH] core: remove unused variables detected by Clang

These variables have been left since the recent big merge. Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com --- drm/nouveau/nvkm/engine/device/base.c | 4 drm/nouveau/nvkm/engine/dma/base.c| 5 - drm/nouveau/nvkm/engine/sw/base.c | 5 - 3 files changed, 14 deletions

Re: [Nouveau] [PATCH] [resend] nouveau: Disable AGP for SiS 761

This patch has been merged by Ben yesterday. http://cgit.freedesktop.org/~darktama/nouveau/commit/?id=8c713f90a63ffca10d122af09d439f3409c933ed Why do you send a new version ? Is the previous patch wrong? On 09/30/2015 01:48 PM, Ondrej Zary wrote: SiS 761 chipset does not support AGP cards but

[Nouveau] [PATCH v3] ibus/gf100: increase wait timeout to avoid read faults

-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- V3: changed some nvkm_mask() to nvkm_wr32() for gf100 (as the blob does) drm/nouveau/include/nvkm/subdev/ibus.h | 1 + drm/nouveau/nvkm/engine/device/base.c | 4 +-- drm/nouveau/nvkm/subdev/ibus/Kbuild| 1 + drm/nouveau/nvkm/

[Nouveau] [PATCH 1/2] fb/ramgf100: disable memory reclocking by default

Although memory reclocking seems to be completely broken on my GF119, we can at least allow users to enable reclocking for the core clock. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- drm/nouveau/nvkm/subdev/fb/ramgf100.c | 2 +- 1 file changed, 1 insertion(+), 1 de

Re: [Nouveau] [PATCH 2/2] clk/gf100: allow users to enable reclocking

On 09/24/2015 12:00 AM, Martin Peres wrote: On 24/09/15 00:20, Samuel Pitoiset wrote: Only the core clock is currently supported. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- drm/nouveau/nvkm/subdev/clk/gf100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Nouveau] [PATCH 2/2] clk/gf100: allow users to enable reclocking

Only the core clock is currently supported. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- drm/nouveau/nvkm/subdev/clk/gf100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c

[Nouveau] [PATCH] ibus/gf100: increase wait timeout to avoid read faults

-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- drm/nouveau/include/nvkm/subdev/ibus.h | 1 + drm/nouveau/nvkm/engine/device/base.c | 4 +-- drm/nouveau/nvkm/subdev/ibus/Kbuild| 1 + drm/nouveau/nvkm/subdev/ibus/gf100.c | 17 ++-- drm/nouveau/nvkm/subdev/ibus/g

[Nouveau] [PATCH v2] ibus/gf100: increase wait timeout to avoid read faults

-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- V2: increase mask for the gf100 case drm/nouveau/include/nvkm/subdev/ibus.h | 1 + drm/nouveau/nvkm/engine/device/base.c | 4 +-- drm/nouveau/nvkm/subdev/ibus/Kbuild| 1 + drm/nouveau/nvkm/subdev/ibus/gf100.c | 17 ++-

Re: [Nouveau] NV50 compute support questions

On 12/07/2015 04:10 PM, Hans de Goede wrote: Hi Hi, On 04-12-15 09:45, Hans de Goede wrote: I've ordered a GTX740 (GK107) card, which should arrive soon, and I'll be using that so I can (hopefully) focus on the llvm tgsi bits again. So the card arrived today and I've plugged it in

Re: [Nouveau] [mesa v2 8/9] nvc0: remove allocation of unused sw class

NACK. This patches breaks MP performance counters on Fermi/Kepler because they actually use software methods to configure multiplexers. Global perf counters will also use software methods to init, sample and read hardware counters, so this SW object is definitely needed. Instead of removing

Re: [Nouveau] NV50 compute support questions

On 12/02/2015 04:34 PM, Hans de Goede wrote: On 01-12-15, Samuel Pitoiset wrote: >>> Ok, here is a MMT trace of vectorAdd: >>> >>> https://fedorapeople.org/~jwrdegoede/vectorAdd.log.gz >> >> Hi Hans, >> >> Thanks a lot. > >

Re: [Nouveau] NV50 compute support questions

On 12/04/2015 10:12 AM, Hans de Goede wrote: Hi, On 04-12-15 09:54, Samuel Pitoiset wrote: On 12/04/2015 09:45 AM, Hans de Goede wrote: Please give a shot at this branch : http://cgit.freedesktop.org/~hakzsam/mesa/log/?h=nvf0_compute It fixes the initialization of the compute state

Re: [Nouveau] NV50 compute support questions

On 12/04/2015 09:45 AM, Hans de Goede wrote: Hi, On 02-12-15 19:33, Samuel Pitoiset wrote: On 12/02/2015 04:34 PM, Hans de Goede wrote: On 01-12-15, Samuel Pitoiset wrote: >>> Ok, here is a MMT trace of vectorAdd: >>> >>> https://fedorapeople.org/~

Re: [Nouveau] [mesa v3 1/9] nouveau: bump required libdrm version to 2.4.66

This series is: Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Tested-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> On 12/17/2015 12:21 AM, Ben Skeggs wrote: From: Ben Skeggs <bske...@redhat.com> v2. forgot bump for non-gallium driver Signed-off-by: Ben Skeggs &

Re: [Nouveau] [mesa v3 8/9] nvc0: remove use of deprecated sw class identifier

On 12/18/2015 11:19 AM, Emil Velikov wrote: The commit summary "remove use of deprecated..." is no longer applicable. Feel free to tweak (use nvif provided class name/define ?) before pushing. Well, the commit summary is fine by me because the old sw class identifier is actually deprecated

Re: [Nouveau] [libdrm v3 01/14] nouveau: import and install a selection of nvif headers from the kernel

Hi Ben, I don't feel comfortable enough with the libdrm nouveau code to give you my Rb for this series, but as this seems work as expected, this series is: Tested-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Thanks for your work! On 12/17/2015 12:20 AM, Ben Skeggs wrote: Fro

Re: [Nouveau] NV50 compute support questions

On 11/30/2015 02:27 PM, Hans de Goede wrote: Hi, On 26-11-15 13:52, Samuel Pitoiset wrote: I do not have a GK106, I've a GK208, and IIRC that one is known to not work, I guess I can give it a try. Compute support is not supported on GK110+, yeah... If you provide me a MMT trace

Re: [Nouveau] NV50 compute support questions

On 11/30/2015 04:13 PM, Samuel Pitoiset wrote: On 11/30/2015 02:27 PM, Hans de Goede wrote: Hi, On 26-11-15 13:52, Samuel Pitoiset wrote: I do not have a GK106, I've a GK208, and IIRC that one is known to not work, I guess I can give it a try. Compute support is not supported

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