Re: [Nouveau] [PATCH 5/5] recognize and accelerate GM20x

2016-10-19 Thread Martin Peres

On 18/10/16 12:19, Alexandre Courbot wrote:

On Mon, Oct 17, 2016 at 6:47 PM, Samuel Pitoiset
 wrote:

This requires at least a quick test. :-)

Acked-by: Samuel Pitoiset 


On 10/16/2016 09:14 PM, Ilia Mirkin wrote:

Signed-off-by: Ilia Mirkin 
---

Untested. I don't have the hardware.

Tested on GM206, working great so far!

The series:
Tested-by: Alexandre Courbot 

What about the glyph issues you reported? Fixed by a new version?

Martin
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Re: [Nouveau] [PATCH 5/5] recognize and accelerate GM20x

2016-10-18 Thread Alexandre Courbot
On Mon, Oct 17, 2016 at 6:47 PM, Samuel Pitoiset
 wrote:
> This requires at least a quick test. :-)
>
> Acked-by: Samuel Pitoiset 
>
>
> On 10/16/2016 09:14 PM, Ilia Mirkin wrote:
>>
>> Signed-off-by: Ilia Mirkin 
>> ---
>>
>> Untested. I don't have the hardware.

Tested on GM206, working great so far!

The series:
Tested-by: Alexandre Courbot 
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Re: [Nouveau] [PATCH 5/5] recognize and accelerate GM20x

2016-10-17 Thread Samuel Pitoiset

This requires at least a quick test. :-)

Acked-by: Samuel Pitoiset 

On 10/16/2016 09:14 PM, Ilia Mirkin wrote:

Signed-off-by: Ilia Mirkin 
---

Untested. I don't have the hardware.

 src/nv_driver.c  |  2 ++
 src/nvc0_accel.c | 10 +-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/nv_driver.c b/src/nv_driver.c
index fff83f8..61940a8 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -390,6 +390,7 @@ NVHasKMS(struct pci_device *pci_dev, struct 
xf86_platform_device *platform_dev)
case 0xf0:
case 0x100:
case 0x110:
+   case 0x120:
break;
default:
xf86DrvMsg(-1, X_ERROR, "Unknown chipset: NV%02X\n", chipset);
@@ -941,6 +942,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
pNv->Architecture = NV_KEPLER;
break;
case 0x110:
+   case 0x120:
pNv->Architecture = NV_MAXWELL;
break;
default:
diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
index 8da5051..996fb88 100644
--- a/src/nvc0_accel.c
+++ b/src/nvc0_accel.c
@@ -236,9 +236,17 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
} else if (pNv->dev->chipset < 0x110) {
class  = 0xa197;
handle = 0x906e;
-   } else {
+   } else if (pNv->dev->chipset < 0x120) {
class  = 0xb097;
handle = 0x906e;
+   } else if (pNv->dev->chipset < 0x130) {
+   class  = 0xb197;
+   handle = 0x906e;
+   } else {
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+  "No 3D acceleration support for NV%X\n",
+  pNv->dev->chipset);
+   return FALSE;
}

ret = nouveau_object_new(pNv->channel, class, class,



--
-Samuel
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[Nouveau] [PATCH 5/5] recognize and accelerate GM20x

2016-10-16 Thread Ilia Mirkin
Signed-off-by: Ilia Mirkin 
---

Untested. I don't have the hardware.

 src/nv_driver.c  |  2 ++
 src/nvc0_accel.c | 10 +-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/nv_driver.c b/src/nv_driver.c
index fff83f8..61940a8 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -390,6 +390,7 @@ NVHasKMS(struct pci_device *pci_dev, struct 
xf86_platform_device *platform_dev)
case 0xf0:
case 0x100:
case 0x110:
+   case 0x120:
break;
default:
xf86DrvMsg(-1, X_ERROR, "Unknown chipset: NV%02X\n", chipset);
@@ -941,6 +942,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
pNv->Architecture = NV_KEPLER;
break;
case 0x110:
+   case 0x120:
pNv->Architecture = NV_MAXWELL;
break;
default:
diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
index 8da5051..996fb88 100644
--- a/src/nvc0_accel.c
+++ b/src/nvc0_accel.c
@@ -236,9 +236,17 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
} else if (pNv->dev->chipset < 0x110) {
class  = 0xa197;
handle = 0x906e;
-   } else {
+   } else if (pNv->dev->chipset < 0x120) {
class  = 0xb097;
handle = 0x906e;
+   } else if (pNv->dev->chipset < 0x130) {
+   class  = 0xb197;
+   handle = 0x906e;
+   } else {
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+  "No 3D acceleration support for NV%X\n",
+  pNv->dev->chipset);
+   return FALSE;
}
 
ret = nouveau_object_new(pNv->channel, class, class,
-- 
2.7.3

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