Role : ASIC Verification Engineer

2016-07-25 Thread saurabh sharma
Hi, Role : ASIC Verification Engineer Location: Cleveland, OH, USA Duration : 6+ Months Must: (ITA level or below only), - Min. 4 yrs, max 7 yrs experience with atleast 1 full chip formal verification projects on functional Logical Equivalance Checking at different levels of comparision

Role : ASIC Verification Engineer

2016-07-25 Thread saurabh sharma
Hi, Role : ASIC Verification Engineer Location: Cleveland, OH, USA Duration : 6+ Months Must: (ITA level or below only), - Min. 4 yrs, max 7 yrs experience with atleast 1 full chip formal verification projects on functional Logical Equivalance Checking at different levels of comparision