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Jon
On Sat, Jul 6, 2013 at 6:09 AM, Oleksij Rempel wrote:
> Am 06.07.2013 11:51, schrieb Andreas Fritiofson:
>> On Sat, Jul 6, 2013 at 1:18 AM, [email protected]
>> <mailto:[email protected]> > <mailto:[email protected]>> wrote:
>>
>> I was able to
I got into this
problem because I loaded a uboot built for 64MB onto a 32MB board.
When uboot relocated, it relocated into non-existent memory.
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On Fri, Jul 5, 2013 at 5:11 PM, [email protected] wrote:
> Here's the error when gdb sends the wrong register size...
I built gdb from current git source to make sure it is the latest.
With 'set arch mips:isa32' in gdb I don't get the
'P25=2080' e
p(): dropped 'gdb' connection
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_
n error -1.
(gdb) ni
Warning:
Cannot insert breakpoint 2.
Error accessing memory address 0x80200400: Unknown error -1.
Cannot insert breakpoint 1.
Error accessing memory address 0x802006cc: Unknown error -1.
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jonsm...
dropped 'gdb' connection
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On Fri, Jul 5, 2013 at 1:13 PM, Andreas Fritiofson
wrote:
> On Fri, Jul 5, 2013 at 3:58 PM, [email protected]
> wrote:
>>
>> On Fri, Jul 5, 2013 at 9:54 AM, [email protected]
>> wrote:
>> > On your commit..
>> >
>> > $_TARGETNAME config
On Fri, Jul 5, 2013 at 9:54 AM, [email protected] wrote:
> On your commit..
>
> $_TARGETNAME configure -work-area-phys 0xA008 -work-area-size 4096
>
>> mdw 0xa1c8 200
>
> No difference in time, about 20 seconds.
I backed up to the commit behind yours, same beha
On your commit..
$_TARGETNAME configure -work-area-phys 0xA008 -work-area-size 4096
> mdw 0xa1c8 200
No difference in time, about 20 seconds.
On Fri, Jul 5, 2013 at 9:04 AM, Drasko DRASKOVIC
wrote:
> On Fri, Jul 5, 2013 at 2:41 PM, [email protected] wrote:
>> Same pro
On Fri, Jul 5, 2013 at 4:37 AM, Drasko DRASKOVIC
wrote:
> Hi Jon,
>
> On Fri, Jul 5, 2013 at 4:10 AM, [email protected] wrote:
>> On Thu, Jul 4, 2013 at 7:40 PM, Drasko DRASKOVIC
>> wrote:
>>> On Thu, Jul 4, 2013 at 11:32 PM, Andreas Fritiofson
>>> wr
All of the delay is happening inside mips32_pracc_exec(). When I read
200 bytes it will go through the inner while loop 1,000 times.
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On Thu, Jul 4, 2013 at 10:10 PM, [email protected] wrote:
> On Thu, Jul 4, 2013 at 7:40 PM, Drasko DRASKOVIC
> wrote:
>> On Thu, Jul 4, 2013 at 11:32 PM, Andreas Fritiofson
>> wrote:
>>
>>> What is at 0x8020? At 0x8004? Is it slow if you load something
ed=1t:3588,r:0,s:0,i:79&iact=rc&page=1&tbnh=143&tbnw=224&start=0&ndsp=20&tx=113&ty=52
>
> BR,
> Drasko
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On Thu, Jul 4, 2013 at 6:22 PM, [email protected] wrote:
> On Thu, Jul 4, 2013 at 5:32 PM, Andreas Fritiofson
> wrote:
>>
>> On Thu, Jul 4, 2013 at 9:32 PM, [email protected]
>> wrote:
>>>
>>> I'm using an Olimex ARM-USB-OCD. Target is a
On Thu, Jul 4, 2013 at 5:32 PM, Andreas Fritiofson
wrote:
>
> On Thu, Jul 4, 2013 at 9:32 PM, [email protected]
> wrote:
>>
>> I'm using an Olimex ARM-USB-OCD. Target is a MIPS based router chip?
>> openocd seems to be working, it is just painfully slow. It took
reset_config trst_and_srst
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OpenOC
I commented out those 18 dummy registers and it seems to be working,
What is going on?
On Sun, Jun 9, 2013 at 10:33 AM, [email protected] wrote:
> OpenOCD is sending 90 registers to gdb but gdb doesn't want 90. What
> is this 18 unknown registers to handle gdb requests?
>
>
0000000
(gdb) quit
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On Mon, Apr 22, 2013 at 6:19 PM, Peter Stuge wrote:
> [email protected] wrote:
> > is it feasible to run OpenOCD on the MIPS then bit bang SWD over
> > some GPIO to initially program the flash on the Cortex?
>
> Don't bother with OpenOCD.
>
>
> > Th
On Mon, Apr 22, 2013 at 5:30 PM, [email protected] wrote:
>
>
>
> On Mon, Apr 22, 2013 at 4:49 PM, Andreas Fritiofson <
> [email protected]> wrote:
>
>> On Mon, Apr 22, 2013 at 9:22 PM, [email protected]
>> wrote:
>>
>>> We're
On Mon, Apr 22, 2013 at 4:49 PM, Andreas Fritiofson <
[email protected]> wrote:
> On Mon, Apr 22, 2013 at 9:22 PM, [email protected] wrote:
>
>> We're designing a new board that uses a MIPS based RT5350. The RT5350
>> doesn't have any ADC support so t
ble to run OpenOCD on the MIPS then bit bang SWD over some GPIO to
initially program the flash on the Cortex?
This is my first SWD design so I'm still figuring things out.
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Precog is a
Is this something that could be added to openocd to allow it to
support AVR processors?
http://www.lura.sk/?&LP=111EN&MP=4&ML=3&PO=%27%27
I have a JTAGICEMK2 but a lot of people complain that it costs $300.
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Jon Smirl
jo
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