Re: [OpenOCD-devel] Cortex-A cache handling thoughts

2015-04-17 Thread Chris Johns
On 10/04/2015 7:12 am, Paul Fertser wrote: > Hi, > > Oleksij is working on making OpenOCD properly for debugging kernel and > the userspace on what seems to be the toughest ARM configuration now: > dual SMP core Cortex-A9 (i.MX6) with MMU, L1 and L2 caches enabled and > AHB-AP available. We spent

Re: [OpenOCD-devel] Cortex-A cache handling thoughts

2015-04-15 Thread Paul Fertser
Hi, Passing Christopher Head's reply[1] here for the sake of visibility, with my comments inline. On Fri, Apr 10, 2015 at 12:12:52AM +0300, Paul Fertser wrote: >> My idea is that we should first agree on how it should be done >> properly, then try to implement it; current patches we have on >> Ge

[OpenOCD-devel] Cortex-A cache handling thoughts

2015-04-09 Thread Paul Fertser
Hi, Oleksij is working on making OpenOCD properly for debugging kernel and the userspace on what seems to be the toughest ARM configuration now: dual SMP core Cortex-A9 (i.MX6) with MMU, L1 and L2 caches enabled and AHB-AP available. We spent some time today experimenting and discussing the issues