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On 05/11/2010 09:53 PM, Spencer Oliver wrote:
On 11/05/2010 18:22, Øyvind Harboe wrote:
So should we just apply this patch you think?
Possibly limiting the revision to = B1. I don't have access to a later
revision chip, and I will most likely
So should we just apply this patch you think?
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Øyvind Harboe
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ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
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On 11/05/2010 18:22, Øyvind Harboe wrote:
So should we just apply this patch you think?
Do not have any tempest silicon to test, but it sounds as if they forgot
to fix this old bug.
Tobias,
Can you confirm that the srst pin is actually getting asserted/released?
Another test is to hold the
On 04/27/2010 03:38 PM, Øyvind Harboe wrote:
Could you attach a patch?
Of course, but as I said, I don't know for certain that this is a
correct fix or not. I also don't know if it is needed only for certain
revisions of the device (= B1). It would be nice if someone with a C1
or C3 rev
[I accidentally sent this from the wrong email address. I'm resending
from the correct (subscribed) address. My apologies if both arrive.]
I'm having problems with reset halt and reset init with the
EK-LM3S9B92, both with 0.4.0 and the latest git. I'm starting openocd using
openocd -f
