On 2007-12-22, at 下午9:17, 陶捷 TaoJie wrote:
Hi Bart,
I noticed this email just now :(
Thank you for your advice.
Are there any barrier instructions on x86/x64 could force the rdtsc
to behave sychronously?
iret, xchg, cpuid, sfence, lock, etc. but cpuid changes eax etc,
sfence is not
On Sat, 22 Dec 2007, Minskey Guo wrote:
On 2007-12-22, at 下午9:17, 陶捷 TaoJie wrote:
Hi Bart,
I noticed this email just now :(
Thank you for your advice.
Are there any barrier instructions on x86/x64 could force the rdtsc to
behave sychronously?
iret, xchg, cpuid, sfence, lock, etc.
2007/12/22, Frank Hofmann [EMAIL PROTECTED]:
On Sat, 22 Dec 2007, Minskey Guo wrote:
On 2007-12-22, at 下午9:17, 陶捷 TaoJie wrote:
Hi Bart,
I noticed this email just now :(
Thank you for your advice.
Are there any barrier instructions on x86/x64 could force the rdtsc to
On Sat, 22 Dec 2007, 陶捷 TaoJie wrote:
2007/12/22, Frank Hofmann [EMAIL PROTECTED]:
On Sat, 22 Dec 2007, Minskey Guo wrote:
On 2007-12-22, at 下午9:17, 陶捷 TaoJie wrote:
Hi Bart,
I noticed this email just now :(
Thank you for your advice.
Are there any barrier instructions on x86/x64
