Here is analysis by Paolo Bonzini:
I compared crypto/x86_64cpuid.pl and crypto/x86cpuid.pl, and the code in the
latter is wrong.
From x86_64cpuid.pl:
mov %edx,%r10d # %r9d:%r10d is copy of %ecx:%edx
bt \$27,%r9d # check OSXSAVE bit
As some of you may be aware the new Oracle SPARC T4 processor has
hardware crypto support just like its predecessors SPARC T1,T2,T3.
However unlike the prior SPARC T series processors the hardware crypto
is not hyper-privileged but is instead new instructions accessible from
unprivileged
There are some fairly severe performance hits in engine support unless the engine includes all the submodes as well.That includes things you are just starting to play with now, like the combined AES+SHA1 on x86.For features that are part of CPU's - rather than plug in cards - my preference would
