commit ucode-intel for openSUSE:Leap:15.2

2020-06-25 Thread root
Hello community,

here is the log from the commit of package ucode-intel for openSUSE:Leap:15.2 
checked in at 2020-06-25 16:37:57

Comparing /work/SRC/openSUSE:Leap:15.2/ucode-intel (Old)
 and  /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.3060 (New)


Package is "ucode-intel"

Thu Jun 25 16:37:57 2020 rev:69 rq:816920 version:20200616

Changes:

--- /work/SRC/openSUSE:Leap:15.2/ucode-intel/ucode-intel.changes
2020-06-10 16:50:42.416498737 +0200
+++ /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.3060/ucode-intel.changes  
2020-06-25 16:37:58.447134565 +0200
@@ -1,0 +2,14 @@
+Wed Jun 17 06:07:24 UTC 2020 - Marcus Meissner 
+
+- Updated Intel CPU Microcode to 20200616 official release (bsc#1172856)
+  - revert 06-4e-03 Skylake U/Y, U23e ucode back to 00d6 release
+  - revert 06-5e-03 Skylake H/S ucode back to 00d6 release,
+as both cause stability issues.  (bsc#1172856)
+
+---
+Mon Jun 15 06:05:31 UTC 2020 - Marcus Meissner 
+
+- Updated Intel CPU Microcode to 20200609 official release (bsc#1172466)
+  - no changes to 20200602 prerelease
+
+---

Old:

  microcode-20200602.tar.gz

New:

  microcode-20200616.tar.gz



Other differences:
--
++ ucode-intel.spec ++
--- /var/tmp/diff_new_pack.FCUqBn/_old  2020-06-25 16:37:58.787135694 +0200
+++ /var/tmp/diff_new_pack.FCUqBn/_new  2020-06-25 16:37:58.791135707 +0200
@@ -17,7 +17,7 @@
 
 
 Name:   ucode-intel
-Version:20200602
+Version:20200616
 Release:0
 Summary:Microcode Updates for Intel x86/x86-64 CPUs
 License:SUSE-Firmware
@@ -26,7 +26,7 @@
 #License is: Intel Software License Agreement
 Url:
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files
 Source1:ucode-intel-rpmlintrc
-Source0:microcode-%version.tar.gz
+Source0:
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/archive/microcode-%version.tar.gz
 Supplements:
modalias(x86cpu:vendor%3A%3Afamily%3A*%3Amodel%3A*%3Afeature%3A*)
 # new method ... note that only 1 : might be present, otherwise libzypp 
misinterprets it.
 Supplements:modalias(cpu:type%3Ax86*ven*)

++ microcode-20200602.tar.gz -> microcode-20200616.tar.gz ++
Binary files 
old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200602/intel-ucode/06-4e-03
 and 
new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/intel-ucode/06-4e-03
 differ
Binary files 
old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200602/intel-ucode/06-5e-03
 and 
new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/intel-ucode/06-5e-03
 differ
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' 
old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200602/releasenote 
new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/releasenote
--- 
old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200602/releasenote   
2020-06-03 16:32:49.404816863 +0200
+++ 
new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/releasenote   
2020-06-16 18:33:02.0 +0200
@@ -82,37 +82,15 @@
 linux-kernel-patches\) are included in the distribution before packaging the
 BDX-ML microcode for late-loading.
 
-== 20200602_DEMO Release ==
--- Updates upon 20200520 release --
+== 20200616 Release ==
+-- Updates upon 20200609 release --
 Processor Identifier Version   Products
 ModelStepping F-MO-S/PI  Old->New
  new platforms 
 
  updated platforms 
-HSW  C0   6-3c-3/32 0027->0028 Core Gen4
-BDW-U/Y  E0/F06-3d-4/c0 002e->002f Core Gen5
-HSW-UC0/D06-45-1/72 0025->0026 Core Gen4
-HSW-HC0   6-46-1/32 001b->001c Core Gen4
-BDW-H/E3 E0/G06-47-1/22 0021->0022 Core Gen5
-SKL-U/Y  D0   6-4e-3/c0 00d6->00dc Core Gen6 Mobile
-SKL-U23e K1   6-4e-3/c0 00d6->00dc Core Gen6 Mobile
-SKX-SP   B1   6-55-3/97 01000151->01000157 Xeon Scalable
-SKX-SP   H0/M0/U0 6-55-4/b7 0265->02006906 Xeon Scalable
-SKX-DM1   6-55-4/b7 0265->02006906 Xeon D-21xx
-CLX-SP   B0   6-55-6/bf 042c->04002f01 Xeon Scalable Gen2
-CLX-SP   B1   6-55-7/bf 052c->04002f01 Xeon Scalable Gen2
-SKL-H/S  R0/N06-5e-3/36 00d6->00dc Core Gen6; Xeon E3 v5
-AML-Y22  H0   6-8e-9/10 00ca->00d6 Core Gen8 Mobile
-KBL-U/Y  H0   6-8e-9/c0 00ca->00d6 Core Gen7 

commit ucode-intel for openSUSE:Leap:15.2

2020-06-10 Thread root
Hello community,

here is the log from the commit of package ucode-intel for openSUSE:Leap:15.2 
checked in at 2020-06-10 16:50:34

Comparing /work/SRC/openSUSE:Leap:15.2/ucode-intel (Old)
 and  /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.3606 (New)


Package is "ucode-intel"

Wed Jun 10 16:50:34 2020 rev:68 rq:813019 version:20200602

Changes:

--- /work/SRC/openSUSE:Leap:15.2/ucode-intel/ucode-intel.changes
2020-04-25 19:08:39.928057611 +0200
+++ /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.3606/ucode-intel.changes  
2020-06-10 16:50:42.416498737 +0200
@@ -1,0 +2,56 @@
+Wed Jun  3 14:44:24 UTC 2020 - Marcus Meissner 
+
+- Updated Intel CPU Microcode to 20200602 (prerelease) (bsc#1172466)
+  
+  Fixes for:
+  - CVE-2020-0543: Fixed a side channel attack against special registers
+which could have resulted in leaking of read values to cores other
+than the one which called it.  This attack is known as Special Register
+Buffer Data Sampling (SRBDS) or "CrossTalk" (bsc#1154824).
+  - CVE-2020-0548,CVE-2020-0549: Additional ucode updates were supplied to
+mitigate the Vector Register and L1D Eviction Sampling aka "CacheOutAttack"
+attacks. (bsc#1156353)
+
+  == 20200602_DEMO Release ==
+  -- Updates upon 20200520 release --
+  Processor Identifier Version   Products
+  ModelStepping F-MO-S/PI  Old->New
+   new platforms 
+
+   updated platforms 
+  HSW  C0   6-3c-3/32 0027->0028 Core Gen4
+  BDW-U/Y  E0/F06-3d-4/c0 002e->002f Core Gen5
+  HSW-UC0/D06-45-1/72 0025->0026 Core Gen4
+  HSW-HC0   6-46-1/32 001b->001c Core Gen4
+  BDW-H/E3 E0/G06-47-1/22 0021->0022 Core Gen5
+  SKL-U/Y  D0   6-4e-3/c0 00d6->00dc Core Gen6 Mobile
+  SKL-U23e K1   6-4e-3/c0 00d6->00dc Core Gen6 Mobile
+  SKX-SP   B1   6-55-3/97 01000151->01000157 Xeon Scalable
+  SKX-SP   H0/M0/U0 6-55-4/b7 0265->02006906 Xeon Scalable
+  SKX-DM1   6-55-4/b7 0265->02006906 Xeon D-21xx
+  CLX-SP   B0   6-55-6/bf 042c->04002f01 Xeon Scalable Gen2
+  CLX-SP   B1   6-55-7/bf 052c->04002f01 Xeon Scalable Gen2
+  SKL-H/S  R0/N06-5e-3/36 00d6->00dc Core Gen6; Xeon E3 v5
+  AML-Y22  H0   6-8e-9/10 00ca->00d6 Core Gen8 Mobile
+  KBL-U/Y  H0   6-8e-9/c0 00ca->00d6 Core Gen7 Mobile
+  CFL-U43e D0   6-8e-a/c0 00ca->00d6 Core Gen8 Mobile
+  WHL-UW0   6-8e-b/d0 00ca->00d6 Core Gen8 Mobile
+  AML-Y42  V0   6-8e-c/94 00ca->00d6 Core Gen10 Mobile
+  CML-Y42  V0   6-8e-c/94 00ca->00d6 Core Gen10 Mobile
+  WHL-UV0   6-8e-c/94 00ca->00d6 Core Gen8 Mobile
+  KBL-G/H/S/E3 B0   6-9e-9/2a 00ca->00d6 Core Gen7; Xeon E3 v6
+  CFL-H/S/E3   U0   6-9e-a/22 00ca->00d6 Core Gen8 Desktop, 
Mobile, Xeon E
+  CFL-SB0   6-9e-b/02 00ca->00d6 Core Gen8
+  CFL-H/S  P0   6-9e-c/22 00ca->00d6 Core Gen9
+  CFL-HR0   6-9e-d/22 00ca->00d6 Core Gen9 Mobile
+
+- Updated Intel CPU Microcode to 20200520
+
+  Processor Identifier Version   Products
+  ModelStepping F-MO-S/PI  Old->New
+   new platforms 
+   updated platforms 
+  SNB-E/EN/EP  C1/M06-2d-6/6d 061f->0621 Xeon E3/E5, Core X
+  SNB-E/EN/EP  C2/M16-2d-7/6d 0718->071a Xeon E3/E5, Core X
+
+---

Old:

  06-55-04
  microcode-20191115.tar.gz

New:

  microcode-20200602.tar.gz



Other differences:
--
++ ucode-intel.spec ++
--- /var/tmp/diff_new_pack.n487KC/_old  2020-06-10 16:50:42.828499933 +0200
+++ /var/tmp/diff_new_pack.n487KC/_new  2020-06-10 16:50:42.832499944 +0200
@@ -17,7 +17,7 @@
 
 
 Name:   ucode-intel
-Version:20191115
+Version:20200602
 Release:0
 Summary:Microcode Updates for Intel x86/x86-64 CPUs
 License:SUSE-Firmware
@@ -26,8 +26,7 @@
 #License is: Intel Software License Agreement
 Url:
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files
 Source1:ucode-intel-rpmlintrc
-Source0:
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/archive/microcode-%version.tar.gz
-Source2:   06-55-04
+Source0:microcode-%version.tar.gz
 Supplements:
modalias(x86cpu:vendor%3A%3Afamily%3A*%3Amodel%3A*%3Afeature%3A*)
 # new 

commit ucode-intel for openSUSE:Leap:15.2

2020-04-25 Thread root
Hello community,

here is the log from the commit of package ucode-intel for openSUSE:Leap:15.2 
checked in at 2020-04-25 19:08:21

Comparing /work/SRC/openSUSE:Leap:15.2/ucode-intel (Old)
 and  /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.2738 (New)


Package is "ucode-intel"

Sat Apr 25 19:08:21 2020 rev:67 rq:797250 version:20191115

Changes:

--- /work/SRC/openSUSE:Leap:15.2/ucode-intel/ucode-intel.changes
2020-01-30 06:08:34.686470350 +0100
+++ /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.2738/ucode-intel.changes  
2020-04-25 19:08:39.928057611 +0200
@@ -1,0 +2,6 @@
+Tue Apr 21 15:24:36 UTC 2020 - Marcus Meissner 
+
+- updated skylake microcode to the current version. (bsc#1169570)
+  - 0264->02006901
+
+---



Other differences:
--
++ 06-55-04 ++
Binary files /var/tmp/diff_new_pack.WmS4qO/_old and 
/var/tmp/diff_new_pack.WmS4qO/_new differ




commit ucode-intel for openSUSE:Leap:15.2

2020-01-29 Thread root
Hello community,

here is the log from the commit of package ucode-intel for openSUSE:Leap:15.2 
checked in at 2020-01-30 06:08:02

Comparing /work/SRC/openSUSE:Leap:15.2/ucode-intel (Old)
 and  /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.26092 (New)


Package is "ucode-intel"

Thu Jan 30 06:08:02 2020 rev:66 rq:766939 version:20191115

Changes:

--- /work/SRC/openSUSE:Leap:15.2/ucode-intel/ucode-intel.changes
2020-01-15 16:26:43.484696033 +0100
+++ /work/SRC/openSUSE:Leap:15.2/.ucode-intel.new.26092/ucode-intel.changes 
2020-01-30 06:08:34.686470350 +0100
@@ -1,0 +2,6 @@
+Wed Jan 15 15:35:04 UTC 2020 - Marcus Meissner 
+
+- reverted the entry below to 0264 due to occasional faults (bsc#1160478)
+  - SKX-SP   H0/M0/U0 6-55-4/b7 0264->0265 Xeon Scalable
+
+---

New:

  06-55-04



Other differences:
--
++ ucode-intel.spec ++
--- /var/tmp/diff_new_pack.xIpJJw/_old  2020-01-30 06:08:35.226470652 +0100
+++ /var/tmp/diff_new_pack.xIpJJw/_new  2020-01-30 06:08:35.226470652 +0100
@@ -27,6 +27,7 @@
 Url:
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files
 Source1:ucode-intel-rpmlintrc
 Source0:
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/archive/microcode-%version.tar.gz
+Source2:   06-55-04
 Supplements:
modalias(x86cpu:vendor%3A%3Afamily%3A*%3Amodel%3A*%3Afeature%3A*)
 # new method ... note that only 1 : might be present, otherwise libzypp 
misinterprets it.
 Supplements:modalias(cpu:type%3Ax86*ven*)
@@ -40,6 +41,7 @@
 
 %prep
 %setup -q -n Intel-Linux-Processor-Microcode-Data-Files-microcode-%version
+cp %SOURCE2 intel-ucode/
 
 %build
 #it is closed source.. nothing to build.