Yes, the IRQ 4 will go to bit 4. But anyway the IRQ4 is never
triggered, but we can leave it just in case someone needs it for
something ;-)
Now we can't "use hwirq 4" unless there is a handler in PCI driver.
I looked into the irq-ath79-misc.c and I think we need to change
ATH79_MISC_IRQ_COUNT.
We
Dmitry Tunin 于2018年8月22日周三 下午1:08写道：
>
> > > They are similar. I used that code as an example, but the
> > > irq-ath79-pci has your mask/unmask for pci with reading the registers.
> > > It is possible to make one driver for both, but is it really needed?
> > It helps reducing code duplication.
>
>
> > They are similar. I used that code as an example, but the
> > irq-ath79-pci has your mask/unmask for pci with reading the registers.
> > It is possible to make one driver for both, but is it really needed?
> It helps reducing code duplication.
If we completely drop that PCI_CORE IRQ that we ar
Dmitry Tunin 于2018年8月22日周三 上午12:26写道：
> I am still not very competent in the IRQ handling. I thought that if we set
> interrupts = <4>; and the new partent, your "case 4:" may work.
We have it there because it appears in datasheet. But we don't need it
to work unless we know what it's used for.
>
> > This should fix a bug with one IRQ for all PCI devices and also handle the
> > PCI_CORE interrupt.
> No it doesn't. Assigning it in dts doesn't mean that we "handled" it.
> But I still like this patch because it's doing a cleanup of the messy code.
I am still not very competent in the IRQ han
Hi!
Comments inline:
Dmitry Tunin 于2018年8月21日周二 下午10:59写道：
>
> It is based on Chuanhong Guo work.
>
> PCI interrupt controller is not part of PCI. It is a part of reset controller
> with 0x18060018, 0x1806001c control registers.
>
> This should fix a bug with one IRQ for all PCI devices and also h
Performance tests look good too.
вт, 21 авг. 2018 г. в 17:59, Dmitry Tunin :
>
> It is based on Chuanhong Guo work.
>
> PCI interrupt controller is not part of PCI. It is a part of reset controller
> with 0x18060018, 0x1806001c control registers.
>
> This should fix a bug with one IRQ for all PCI d
It is based on Chuanhong Guo work.
PCI interrupt controller is not part of PCI. It is a part of reset controller
with 0x18060018, 0x1806001c control registers.
This should fix a bug with one IRQ for all PCI devices and also handle the
PCI_CORE interrupt.
I am not sure that this kind of cascadin
