Hi, I am currently searching for the reason that MT7621a doesn't want to receive 1526 byte large ethernet frames (1500 mtu, 14 eth hdr, 4 byte outer vlan hdr, 4 byte inner vlan hdr, 4 byte fcs).
One thing I found during my search was the odd looking way the PDMA Rx descriptors were written. if (priv->flags & FE_FLAG_RX_SG_DMA) ring->rx_dma[i].rxd2 = RX_DMA_PLEN0(ring->rx_buf_size); else ring->rx_dma[i].rxd2 = RX_DMA_LSO; This assigment with RX_DMA_PLEN0 happens in two places. And here comes the problem: #define RX_DMA_PLEN0(_x) (((_x) >> 16) & 0x3fff) The rx_buf_size length should be something like 1536. And so this macro always calculates as result a nice "0" (1536 / 65536 -> 0). I would guess that the actual macro should be: #define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16) There is one other place (beside the two previously mentioned ones) where it is used - but this time to read the received bytes: pktlen = RX_DMA_PLEN0(trxd.rxd2); If it is read from the the same place then there should be a second macro which then could be used here: #define RX_DMA_PLEN0_GET(_x) (((_x) >> 16) & 0x3fff) pktlen = RX_DMA_PLEN0_GET(trxd.rxd2); It did not solve my problem but maybe is a different problem which may causes other interesting things (or maybe I am completely wrong). Kind regards, Sven _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel