Re: [OpenWrt-Devel] Howto force mips64

2014-06-18 Thread John Crispin
Hi Martin,

you win the medal as contributor of the day ... i have been fighting
with octeon on and off for almost a month. i just dumped my own series
of patches which tried to fix up uclibc and simple did what you wrote
in the mail and i have a functional image for octeon :)

i just tested this on an esr-lite which seems to work without your
kernel patches. what board are you running on ?

John

On 17/06/2014 11:24, Martin Fäcknitz wrote:
 force mips64 support is quite simple: set
 
 CPU_CFLAGS_octeon=-march=octeon -mabi=64
 
 inside target/linux/octeon/Makefile and replace the same line in 
 include/target.mk. Finally you have to add the following patch:
 
 diff --git
 a/target/linux/octeon/patches-3.10/-cn61xx_support.patch 
 b/target/linux/octeon/patches-3.10/-cn61xx_support.patch new
 file mode 100644 index 000..18d2f3d --- /dev/null +++
 b/target/linux/octeon/patches-3.10/-cn61xx_support.patch @@
 -0,0 +1,47 @@ +Index:
 b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c 
 +===

 
+--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c2014-05-06
 15:24:06.0 +0200 
 b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c   2014-05-06 
 15:25:14.0 +0200 +@@ -75,6 +75,8 @@ + int
 cvmx_helper_board_get_mii_address(int ipd_port) + { + switch
 (cvmx_sysinfo_get()-board_type) { ++ case 20003: ++  return -1; +
 case CVMX_BOARD_TYPE_SIM: +   /* Simulator doesn't have MII */ +
 return -1; +Index:
 b/arch/mips/cavium-octeon/executive/cvmx-helper.c 
 +===

 
+--- a/arch/mips/cavium-octeon/executive/cvmx-helper.c  2014-01-25
 17:27:55.0 +0100 
 b/arch/mips/cavium-octeon/executive/cvmx-helper.c 2014-05-06 
 15:25:47.0 +0200 +@@ -83,7 +83,7 @@ +  */ + int
 cvmx_helper_get_number_of_interfaces(void) + { +- if
 (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) 
 ++if (OCTEON_IS_MODEL(OCTEON_CN56XX) ||
 OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN61XX)) +
 return 4; +   else +  return 3; +@@ -121,7 +121,8 @@ + +  if
 (interface == 3) { +  if (OCTEON_IS_MODEL(OCTEON_CN56XX) +-
 || OCTEON_IS_MODEL(OCTEON_CN52XX)) ++ ||
 OCTEON_IS_MODEL(OCTEON_CN52XX) ++ ||
 OCTEON_IS_MODEL(OCTEON_CN6XXX)) + return
 CVMX_HELPER_INTERFACE_MODE_LOOP; +else +  return
 CVMX_HELPER_INTERFACE_MODE_DISABLED; +@@ -152,7 +153,9 @@ + +
 mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface)); + +- if
 (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX))
 { ++  if (OCTEON_IS_MODEL(OCTEON_CN61XX)) { ++return
 CVMX_HELPER_INTERFACE_MODE_SGMII; ++  } else if
 (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX))
 { +   switch (mode.cn56xx.mode) { +   case 0: +   
 return
 CVMX_HELPER_INTERFACE_MODE_DISABLED;
 
 uclibc's mips64 support is broken, so you have to use glibc.
 gcc-4.8 doesn't work for me (invalid TLS related code), therefore
 use gcc-4.6.
 
 greets
 
 On 16.06.2014 23:26, Edison Figueira Junior wrote:
 hello, I can be a beta test if you want :-)
 
 Enviada do meu iPhone
 
 Em 04/06/2014, às 10:05, John Crispin j...@phrozen.org
 escreveu:
 
 octeon is currently only partially working. we will push a fix
 to trunk in the next few days. experimental patch is currently
 in testing. please be patient for a few dyas
 
 
 On 04/06/2014 14:36, Edison Figueira Junior wrote: Howto
 force to use mips64 for target octeon?
 
 
 
 
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Re: [OpenWrt-Devel] Howto force mips64

2014-06-17 Thread Martin Fäcknitz
force mips64 support is quite simple: set

  CPU_CFLAGS_octeon=-march=octeon -mabi=64

inside target/linux/octeon/Makefile and replace the same line in
include/target.mk. Finally you have to add the following patch:

diff --git a/target/linux/octeon/patches-3.10/-cn61xx_support.patch
b/target/linux/octeon/patches-3.10/-cn61xx_support.patch
new file mode 100644
index 000..18d2f3d
--- /dev/null
+++ b/target/linux/octeon/patches-3.10/-cn61xx_support.patch
@@ -0,0 +1,47 @@
+Index: b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+===
+--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c2014-05-06
15:24:06.0 +0200
 b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c2014-05-06
15:25:14.0 +0200
+@@ -75,6 +75,8 @@
+ int cvmx_helper_board_get_mii_address(int ipd_port)
+ {
+   switch (cvmx_sysinfo_get()-board_type) {
++  case 20003:
++  return -1;
+   case CVMX_BOARD_TYPE_SIM:
+   /* Simulator doesn't have MII */
+   return -1;
+Index: b/arch/mips/cavium-octeon/executive/cvmx-helper.c
+===
+--- a/arch/mips/cavium-octeon/executive/cvmx-helper.c  2014-01-25
17:27:55.0 +0100
 b/arch/mips/cavium-octeon/executive/cvmx-helper.c  2014-05-06
15:25:47.0 +0200
+@@ -83,7 +83,7 @@
+  */
+ int cvmx_helper_get_number_of_interfaces(void)
+ {
+-  if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX))
++  if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) ||
OCTEON_IS_MODEL(OCTEON_CN61XX))
+   return 4;
+   else
+   return 3;
+@@ -121,7 +121,8 @@
+
+   if (interface == 3) {
+   if (OCTEON_IS_MODEL(OCTEON_CN56XX)
+-  || OCTEON_IS_MODEL(OCTEON_CN52XX))
++  || OCTEON_IS_MODEL(OCTEON_CN52XX)
++  || OCTEON_IS_MODEL(OCTEON_CN6XXX))
+   return CVMX_HELPER_INTERFACE_MODE_LOOP;
+   else
+   return CVMX_HELPER_INTERFACE_MODE_DISABLED;
+@@ -152,7 +153,9 @@
+
+   mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
+
+-  if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) {
++  if (OCTEON_IS_MODEL(OCTEON_CN61XX)) {
++  return CVMX_HELPER_INTERFACE_MODE_SGMII;
++  } else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || 
OCTEON_IS_MODEL(OCTEON_CN52XX)) {
+   switch (mode.cn56xx.mode) {
+   case 0:
+   return CVMX_HELPER_INTERFACE_MODE_DISABLED;

uclibc's mips64 support is broken, so you have to use glibc. gcc-4.8
doesn't work for me (invalid TLS related code), therefore use gcc-4.6.

greets

On 16.06.2014 23:26, Edison Figueira Junior wrote:
 hello, I can be a beta test if you want :-)
 
 Enviada do meu iPhone
 
 Em 04/06/2014, às 10:05, John Crispin j...@phrozen.org escreveu:

 octeon is currently only partially working. we will push a fix to
 trunk in the next few days. experimental patch is currently in
 testing. please be patient for a few dyas


 On 04/06/2014 14:36, Edison Figueira Junior wrote:
 Howto force to use mips64 for target octeon?




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-- 
Martin Fäcknitz

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10245 Berlin
Fon: +49 (0)30 29 77 348-48
Fax: +49 (0)30 29 77 348-99
E-Mail: faeckn...@hotsplots.de

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Re: [OpenWrt-Devel] Howto force mips64

2014-06-17 Thread John Crispin


On 17/06/2014 11:24, Martin Fäcknitz wrote:
 uclibc's mips64 support is broken, so you have to use glibc.
 gcc-4.8 doesn't work for me (invalid TLS related code), therefore
 use gcc-4.6.

Hi,

yes, utterly broken :) i have been talking to the guys at imgtec about
this and there are people working on this matter. i would expect it to
take a few months though until this is all fixed and has treacled down
to openwrt.

John
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Re: [OpenWrt-Devel] Howto force mips64

2014-06-17 Thread Martin Fäcknitz
Hi,

here are the patches which will fix the uclibc-mips64-tls problem:

--- a/toolchain/uClibc/patches-0.9.33.2/999-mips64-tprel.patch
+++ b/toolchain/uClibc/patches-0.9.33.2/999-mips64-tprel.patch
@@ -1,8 +1,19 @@
 Index: b/ldso/ldso/mips/elfinterp.c
 ===
 a/ldso/ldso/mips/elfinterp.c   2014-02-12 16:54:05.0 +0100
-+++ b/ldso/ldso/mips/elfinterp.c   2014-02-12 16:54:15.0 +0100
-@@ -248,22 +248,22 @@
+--- a/ldso/ldso/mips/elfinterp.c   2012-05-15 09:20:09.0 +0200
 b/ldso/ldso/mips/elfinterp.c   2014-05-07 17:20:25.0 +0200
+@@ -239,31 +239,31 @@
+   case R_MIPS_TLS_DTPMOD64:
+   case R_MIPS_TLS_DTPMOD32:
+   if (tls_tpnt)
+-  *(ElfW(Word) 
*)reloc_addr = tls_tpnt-l_tls_modid;
++  *(ElfW(Addr) 
*)reloc_addr = tls_tpnt-l_tls_modid;
+ #ifdef __SUPPORT_LD_DEBUG__
+   _dl_dprintf(2, TLS_DTPMOD : 
%s, %d, %d\n,
+-  symname, old_val, 
*((unsigned int *)reloc_addr));
++  symname, old_val, 
*((unsigned long *)reloc_addr));
+ #endif
+   break;
  
case R_MIPS_TLS_DTPREL64:
case R_MIPS_TLS_DTPREL32:
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.33.2/999-mips64-misc.patch
@@ -0,0 +1,141 @@
+Index: b/libc/sysdeps/linux/mips/sysdep.h
+===
+--- a/libc/sysdeps/linux/mips/sysdep.h 2012-05-15 09:20:09.0 +0200
 b/libc/sysdeps/linux/mips/sysdep.h 2014-02-15 14:10:01.0 +0100
+@@ -288,93 +288,52 @@
+of GCC 3.4.3, this is sufficient.  */
+ #define FORCE_FRAME_POINTER alloca (4)
+ 
+-#undef internal_syscall5
+-#define internal_syscall5(ncs_init, cs_init, input, err, arg1, arg2, arg3, 
arg4, arg5)\
+-({\
++#define internal_syscall5(ncs_init, cs_init, input, err, arg1, arg2, arg3, 
arg4, arg5) \
++({\
+   long _sys_result;   \
+   \
+-  FORCE_FRAME_POINTER;\
+   {   \
+-  register long __v0 __asm__($2) ncs_init;  \
+-  register long __a0 __asm__($4) = (long) arg1; \
+-  register long __a1 __asm__($5) = (long) arg2; \
+-  register long __a2 __asm__($6) = (long) arg3; \
+-  register long __a3 __asm__($7) = (long) arg4; \
+-  __asm__ __volatile__ (  \
+-  .set\tnoreorder\n\t   \
+-  subu\t$29, 32\n\t \
+-  sw\t%6, 16($29)\n\t   \
++  register ARG_TYPE __v0 __asm__($2) ncs_init;  \
++  register ARG_TYPE __a0 __asm__($4) = (ARG_TYPE) arg1; \
++  register ARG_TYPE __a1 __asm__($5) = (ARG_TYPE) arg2; \
++  register ARG_TYPE __a2 __asm__($6) = (ARG_TYPE) arg3; \
++  register ARG_TYPE __a3 __asm__($7) = (ARG_TYPE) arg4; \
++  register ARG_TYPE __a4 __asm__($8) = (ARG_TYPE) arg5; \
++  __asm__ __volatile__ (  \
++  .set\tnoreorder\n\t   \
+   cs_init \
+-  syscall\n\t   \
+-  addiu\t$29, 32\n\t\
+-  .set\treorder \
+-  : =r (__v0), +r (__a3)  \
+-  : input, r (__a0), r (__a1), r (__a2),\
+-r ((long)arg5)  \
+-  : __SYSCALL_CLOBBERS);  \
++  syscall\n\t   \
++  .set\treorder \
++  : =r (__v0), +r (__a3)  \
++  : input, r (__a0), r (__a1), r (__a2), r (__a4) \
++  : __SYSCALL_CLOBBERS);  \
+   err = __a3; \
+   _sys_result = __v0; 

Re: [OpenWrt-Devel] Howto force mips64

2014-06-16 Thread Edison Figueira Junior
hello, I can be a beta test if you want :-)

Enviada do meu iPhone

 Em 04/06/2014, às 10:05, John Crispin j...@phrozen.org escreveu:
 
 octeon is currently only partially working. we will push a fix to
 trunk in the next few days. experimental patch is currently in
 testing. please be patient for a few dyas
 
 
 On 04/06/2014 14:36, Edison Figueira Junior wrote:
 Howto force to use mips64 for target octeon?
 
 
 
 
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[OpenWrt-Devel] Howto force mips64

2014-06-04 Thread Edison Figueira Junior
Howto force to use mips64 for target octeon?
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Re: [OpenWrt-Devel] Howto force mips64

2014-06-04 Thread John Crispin
octeon is currently only partially working. we will push a fix to
trunk in the next few days. experimental patch is currently in
testing. please be patient for a few dyas


On 04/06/2014 14:36, Edison Figueira Junior wrote:
 Howto force to use mips64 for target octeon?
 
 
 
 
 ___ openwrt-devel
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