Re: [PATCH] ipq40xx: limit available radio channels for GL.iNet GL-B2200

2022-02-14 Thread Christian Lamparter
Hi,

On Mon, Feb 14, 2022 at 2:29 PM Enrico Mioso  wrote:
> [0.470732] pci :01:00.0: [168c:0056] type 00 class 0x028000
> [   10.587378] ath10k 5.15 driver, optimized for CT firmware, probing pci 
> device: 0x56.
> [   10.588306] ath10k_pci :01:00.0: enabling device (0140 -> 0142)
> [   10.594929] ath10k_pci :01:00.0: pci irq msi oper_irq_mode 2 irq_mode 
> 0 reset_mode 0
> [   11.631567] ath10k_pci :01:00.0: qca9888 hw2.0 target 0x0100 
> chip_id 0x sub :
> [   11.631622] ath10k_pci :01:00.0: kconfig debug 0 debugfs 1 tracing 0 
> dfs 1 testmode 0
> [   11.644152] ath10k_pci :01:00.0: firmware ver 
> 10.4b-ct-9888-fW-13-5ae337bb1 api 5 features 
> mfp,peer-flow-ctrl,txstatus-noack,wmi-10.x-CT,ratemask-CT,regdump-CT,txrate-CT,flush-all-CT,pingpong-CT,ch-regs-CT,nop-CT,set-special-CT,tx-rc-CT,cust-stats-CT,txrate2-CT,beacon-cb-CT,wmi-block-ack-CT,wmi-bcn-rc-CT
>  crc32 59e741e7
> [   11.934144] ath10k_pci :01:00.0: board_file api 2 bmi_id N/A crc32 
> 6535d835
> [   13.376455] ath10k_pci :01:00.0: 10.4 wmi init: vdevs: 16  peers: 48  
> tid: 96
> [   13.376509] ath10k_pci :01:00.0: msdu-desc: 2500  skid: 32
> [   13.430886] ath10k_pci :01:00.0: wmi print 'P 48/48 V 16 K 144 PH 176 
> T 186  msdu-desc: 2500  sw-crypt: 0 ct-sta: 0'
> [   13.431809] ath10k_pci :01:00.0: wmi print 'free: 114572 iram: 12644 
> sram: 29508'
> [   13.628632] ath10k_pci :01:00.0: htt-ver 2.2 wmi-op 6 htt-op 4 cal 
> file max-sta 32 raw 0 hwcrypto 1

Thank you! This ID matches a 9888 V2. It booted with the "cal file"
with no problem.

Cheers,
Christian

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Re: [PATCH] ipq40xx: limit available radio channels for GL.iNet GL-B2200

2022-02-14 Thread Enrico Mioso
 Lamparter wrote:


Date: Fri, 11 Feb 2022 18:06:21
From: Christian Lamparter 
To: Enrico Mioso , openwrt-devel@lists.openwrt.org
Subject: Re: [PATCH] ipq40xx: limit available radio channels for GL.iNet
GL-B2200

On 11/02/2022 10:46, Enrico Mioso wrote:

The PCIe and built-in 5GHZ radios are meant to operate on different
frequency bands. The hardware enforces this via RF filters.
Add this information to allow software enforcing it as well.
Credits to Piotr Dymacz for the invaluable help.

Signed-off-by: Enrico Mioso 
---
Also due to the nature of this patch, testing it might not be easy.
Still, applying it shoudn't cause issues, as the only uncertainty is 
whether we will need to stricter the limits. So I think this should go in.


Somewhat related question: (though, it's about the board itself)

Do you have the board? Can you tell me the pciid of the PCIe ath10k chip,
or a bootlog?

I'm asking because when I was converting it to nvmem
(see commit cfc13c44595db591092859fc6adc71f1d8159c50),
I noticed that the board-data-extraction used the
WAVE-1 files. However GL.iNet says it's a WAVE-2 9886 chip.

Thanks,
Christian


---
  .../ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts   | 2 ++
  1 file changed, 2 insertions(+)

diff --git 
a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts

index 243dcb84d6..754af7c820 100644
--- 
a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
+++ 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts

@@ -367,6 +367,7 @@
nvmem-cell-names = "calibration";
nvmem-cells = <_art_9000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <545 590>;
};
};
  };
@@ -383,4 +384,5 @@
nvmem-cell-names = "pre-calibration";
nvmem-cells = <_art_5000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <510 540>;
  };





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Re: [PATCH] ipq40xx: limit available radio channels for GL.iNet GL-B2200

2022-02-14 Thread Enrico Mioso

Hi!!

Sory for me taking so long to answer, and provide the information.

I promise I'll do so at the end of the week; youcan find some bootlogs in the 
GitHub PR from where I started, but I'll provide fresh logs at the end of the 
week, since I will also need to test DS transition for this board.
In the meantime, you may have a look at:
https://github.com/openwrt/openwrt/issues/4691

Thanks for your help! :)

On Fri, 11 Feb 2022, Christian Lamparter wrote:


Date: Fri, 11 Feb 2022 18:06:21
From: Christian Lamparter 
To: Enrico Mioso , openwrt-devel@lists.openwrt.org
Subject: Re: [PATCH] ipq40xx: limit available radio channels for GL.iNet
GL-B2200

On 11/02/2022 10:46, Enrico Mioso wrote:

The PCIe and built-in 5GHZ radios are meant to operate on different
frequency bands. The hardware enforces this via RF filters.
Add this information to allow software enforcing it as well.
Credits to Piotr Dymacz for the invaluable help.

Signed-off-by: Enrico Mioso 
---
Also due to the nature of this patch, testing it might not be easy.
Still, applying it shoudn't cause issues, as the only uncertainty is 
whether we will need to stricter the limits. So I think this should go in.


Somewhat related question: (though, it's about the board itself)

Do you have the board? Can you tell me the pciid of the PCIe ath10k chip,
or a bootlog?

I'm asking because when I was converting it to nvmem
(see commit cfc13c44595db591092859fc6adc71f1d8159c50),
I noticed that the board-data-extraction used the
WAVE-1 files. However GL.iNet says it's a WAVE-2 9886 chip.

Thanks,
Christian


---
  .../ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts   | 2 ++
  1 file changed, 2 insertions(+)

diff --git 
a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts

index 243dcb84d6..754af7c820 100644
--- 
a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
+++ 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts

@@ -367,6 +367,7 @@
nvmem-cell-names = "calibration";
nvmem-cells = <_art_9000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <545 590>;
};
};
  };
@@ -383,4 +384,5 @@
nvmem-cell-names = "pre-calibration";
nvmem-cells = <_art_5000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <510 540>;
  };





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Re: [PATCH] ipq40xx: limit available radio channels for GL.iNet GL-B2200

2022-02-11 Thread Christian Lamparter

On 11/02/2022 10:46, Enrico Mioso wrote:

The PCIe and built-in 5GHZ radios are meant to operate on different
frequency bands. The hardware enforces this via RF filters.
Add this information to allow software enforcing it as well.
Credits to Piotr Dymacz for the invaluable help.

Signed-off-by: Enrico Mioso 
---
Also due to the nature of this patch, testing it might not be easy.
Still, applying it shoudn't cause issues, as the only uncertainty is whether we 
will need to stricter the limits. So I think this should go in.


Somewhat related question: (though, it's about the board itself)

Do you have the board? Can you tell me the pciid of the PCIe ath10k chip,
or a bootlog?

I'm asking because when I was converting it to nvmem
(see commit cfc13c44595db591092859fc6adc71f1d8159c50),
I noticed that the board-data-extraction used the
WAVE-1 files. However GL.iNet says it's a WAVE-2 9886 chip.

Thanks,
Christian


---
  .../ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts   | 2 ++
  1 file changed, 2 insertions(+)

diff --git 
a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
index 243dcb84d6..754af7c820 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
@@ -367,6 +367,7 @@
nvmem-cell-names = "calibration";
nvmem-cells = <_art_9000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <545 590>;
};
};
  };
@@ -383,4 +384,5 @@
nvmem-cell-names = "pre-calibration";
nvmem-cells = <_art_5000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <510 540>;
  };



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[PATCH] ipq40xx: limit available radio channels for GL.iNet GL-B2200

2022-02-11 Thread Enrico Mioso
The PCIe and built-in 5GHZ radios are meant to operate on different
frequency bands. The hardware enforces this via RF filters.
Add this information to allow software enforcing it as well.
Credits to Piotr Dymacz for the invaluable help.

Signed-off-by: Enrico Mioso 
---
Also due to the nature of this patch, testing it might not be easy.
Still, applying it shoudn't cause issues, as the only uncertainty is whether we 
will need to stricter the limits. So I think this should go in.
---
 .../ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts   | 2 ++
 1 file changed, 2 insertions(+)

diff --git 
a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
index 243dcb84d6..754af7c820 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
@@ -367,6 +367,7 @@
nvmem-cell-names = "calibration";
nvmem-cells = <_art_9000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <545 590>;
};
};
 };
@@ -383,4 +384,5 @@
nvmem-cell-names = "pre-calibration";
nvmem-cells = <_art_5000>;
qcom,ath10k-calibration-variant = "GL-B2200";
+   ieee80211-freq-limit = <510 540>;
 };
-- 
2.34.1


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