[perfmon2] PS3 config conflict with CELL, needs fixing

2008-04-29 Thread Carl Love
should set CONFIG_PPC_PS3=n. The "support for PS3 hardware performance counters" should set the needed options for the cell system and set CONFIG_PPC_PS3=y. I think have a PS3 specific config entry will help the PS3 users who might not otherwise know that PS3 and CELL are rela

Re: [perfmon2] PS3 config conflict with CELL, needs fixing

2008-04-30 Thread Carl Love
m CONFIG_PPC_CELL=y CONFIG_PPC_CELL_NATIVE=y CONFIG_PPC_IBM_CELL_BLADE=y It would appear that given the default config settings the patch disables displaying the entry in make menuconfig. Seems like it still might be easier to have two entries one for

Re: [perfmon2] PS3 config conflict with CELL, needs fixing

2008-05-01 Thread Carl Love
gt; > It seems good. > I confirmed it works well in make menuconfig with cell_defconfig. > Thank you Arnd-san. > > Carl-san, > Please use it! > > Takashi Yamamoto. > I checked and make menucconfig works for me. The kernel also compiles without any of the ps3 errors.

Re: [perfmon2] perfmon2 on Cell

2008-06-06 Thread Carl Love
counter support now would only add additional complexity that would further hinder getting it accepted. So best to try and keep things simple for now, get it accepted then incrementally add the complexity later. Carl Love On Fri, 2008-06-06 at 15:07 -0400, Dan Terpstra wrote: >

Re: [perfmon2] perfmon2 on Cell

2008-06-09 Thread Carl Love
nters. Otherwise the two 16 bit counters are combined into a 32 bit counter. I am assuming pfm_cell_get_event_code() is also a libpfm call. I have not dug into the details of this code. Carl Love On Mon, 2008-06-09 at 11:23 -0400, Dan Terpstra wrote: > More... > > p

Re: [perfmon2] CYCLES overflow on perfmon2 on Cell

2008-06-12 Thread Carl Love
gt; - d > This will be true for all events. Carl Love - Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://source

Re: [perfmon2] CYCLES overflow on perfmon2 on Cell

2008-06-12 Thread Carl Love
I will have to take a look and see what was done. Off the top of my head, I don't remember. Interrupt generation can be enabled/disabled for each counter. By default they are disabled. Carl Love On Thu, 2008-06-12 at 22:19 +0200, stephane eranian wrote: > Carl, > >

Re: [perfmon2] CYCLES overflow on perfmon2 on Cell

2008-06-12 Thread Carl Love
de as there were two of us working on the code. But from the sounds, it probably wasn't done and we will need to fix that. Carl Love On Thu, 2008-06-12 at 22:30 +0200, stephane eranian wrote: > Carl, > > I know that typically interrupt generation on overflow is turne

Re: [perfmon2] CYCLES overflow on perfmon2 on Cell

2008-06-12 Thread Carl Love
, 0xF000, 0xF000, 0, 0), Do I have this correct Stephane? I have tested it yet, I am just winging it! :-) Carl Love > - d > > > -Original Message- > > From: Carl Love [mailto:[EMAIL PROTECTED] > > Sent: Thursday, June 12, 2008 4:41

Re: [perfmon2] CYCLES overflow on perfmon2 on Cell

2008-06-12 Thread Carl Love
On Fri, 2008-06-13 at 00:47 +0200, stephane eranian wrote: > Carl, > > On Thu, Jun 12, 2008 at 11:39 PM, Carl Love <[EMAIL PROTECTED]> wrote: > > > > On Thu, 2008-06-12 at 17:00 -0400, Dan Terpstra wrote: > >> Are counters virtualized on overflow

Re: [perfmon2] CYCLES overflow on perfmon2 on Cell

2008-06-13 Thread Carl Love
x the default values for the counters and it will just work. > > > -Original Message- > > From: stephane eranian [mailto:[EMAIL PROTECTED] > > Sent: Thursday, June 12, 2008 6:48 PM > > To: Carl Love > > Cc: Dan Terpstra; perfmon2-devel@lists.sourceforge.net

[perfmon2] [Patch] CELL fix default reg setting to enable interrupts for HW cntr overflow

2008-06-13 Thread Carl Love
The following patch sets the HW interrupt enable bits for the four 32 bit counters CELL currently supports. This is needed to enable the virtual 64bit counters support by default. Signed-off-by: Carl Love <[EMAIL PROTECTED]> Index: linux-2.6.25.ppc64/arch/powerpc/perfmon/perfmon_

[perfmon2] Perfmon2 Cell hardware sampling support issue

2008-07-18 Thread Carl Love
e format handler calls for all the other architectures as well. I am attaching the patch if you would like to look at it. Perhaps there is another solution then changing the fmt_handler() call. Any thoughts would be appreciated. Thanks. C

Re: [perfmon2] Perfmon2 Cell hardware sampling support issue

2008-07-21 Thread Carl Love
arguments needed by the IBM Cell hardware sampler format. Note that the call changes for the IBM CELL sampler routins is not in this patch. They are in a separate patch that adds all of the CELL support. Signed-off-by: Carl Love <[EMAIL PROTECTED]> Index: linux-2.6.25.ppc64/arch/ia64/p

Re: [perfmon2] comments on Performance Counters for Linux (PCL)

2009-05-29 Thread Carl Love
On Fri, 2009-05-29 at 10:21 +0200, Geert Uytterhoeven wrote: > On Fri, 29 May 2009, Ingo Molnar wrote: > > * Paul Mackerras wrote: > > > Ingo Molnar writes: > > > > * Corey Ashford wrote: > > > > >> So you're suggesting to artificually strech periods by say > > > > >> composing a single overflo

[perfmon2] [PATCH] PPC64 fix long event codes

2014-12-01 Thread Carl Love
a u32. This patch changes the pme_code field to a u64 and fixes the truncated event codes. Signed-off-by: Carl Love --- src/libpfm4/lib/events/power8_events.h | 16 src/libpfm4/lib/pfmlib_power_priv.h|2 +- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a

Re: [perfmon2] [PATCH] PPC64 fix long event codes

2014-12-03 Thread Carl Love
regenerated the patch against the git tree as of 12/3/2014. Thanks for catching that. Carl Love --- PPC64 fix long event codes There are eight Power 8 event codes that do not fit into a u32. The program u