From: Leopold Toetsch [EMAIL PROTECTED]
Seems that we got a problem on alphas then. I can see several solutions
to accomodate such CPUs:
From my point of view, these solutions have the following merits and
demerits:
- use only PMCs that don't cross cache lines
+) No need for memory
Vladimir Lipsky [EMAIL PROTECTED] wrote:
From: Leopold Toetsch [EMAIL PROTECTED]
Seems that we got a problem on alphas then. I can see several solutions
to accomodate such CPUs:
From my point of view, these solutions have the following merits and
demerits:
- use only PMCs that don't cross
Vladimir Lipsky [EMAIL PROTECTED] wrote:
From: Leopold Toetsch [EMAIL PROTECTED]
Yep, that's right. As our PMC size isn't a power of 2, there is a small
chance that Cvtable and Cstr_val are in different cache lines and
Even if the PMC size were a power of two, it woudn't necessitate Cvtable
Gordon Henriksen [EMAIL PROTECTED] wrote:
On Friday, January 30, 2004, at 11:52 , Leopold Toetsch wrote:
+ /*
+ * if we morph to a string, first clear str_val
+ * so that after changing the vtable a parallel
+ * reader doesn't get a gargabe pointer
+ */
From: Leopold Toetsch [EMAIL PROTECTED]
Gordon Henriksen [EMAIL PROTECTED] wrote:
On Friday, January 30, 2004, at 11:52 , Leopold Toetsch wrote:
+ /*
+ * if we morph to a string, first clear str_val
+ * so that after changing the vtable a parallel
+ * reader
