Re: [PEDA] multi sheet problems

2001-12-21 Thread Dwight Harm

Bob,
Two points about this --
1) The list of footprints in the library symbol is merely possible
choices -- you don't have to use any one of these.  So changing the
footprint list in the library should NOT update all the footprints for those
symbols in the schematic.
2) Use global edit if you really want to change all of them to the same
(new) footprint.

-Original Message-
From: Bob Wolfe [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 20, 2001 6:15 PM
snip
I do however agree with the person
talking about how Protel updates board and schematic from library, it is a
little less than I had hoped for in my setup. I really wish the footprints
would REALLY update all symbols from the library.
It does but it will not use those new footprints on a board you need to go
into the schematic for each
unique part and force it to that new footprint. ie if you get properties of
the symbol you see
a pulldown menu for footprint which now does contain the new part too BUT
until you select the
new footprint you will still see the old footprint on the board.

Bob

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Re: [PEDA] Intelligent SCH and PCB components

2001-12-21 Thread Aalt Lokhorst

 Sounds like way to much confusion to me.

I don't mean that you always have to use formulas. I wrote:
  'What we need is the option of using formulas and expressions'

What I mean is that we can do the job in the usual way, but for the
exceptions and the specials it might be helpfull.

We do have the option to use Client Basic in Protel, it is not necessary to
use it, but you can do nice things with it. Take a look at the several
usefull things which are written by Brian Guralnick.
The same is true for Excel, it is possible to use it without programming and
difficult formulas, but if you take some time to learn how to use the
'difficult' things it will pay-back.

Do your production boards change that drastically from the proto? Our's
certainly don't.

No, I like proto's which are almost equal to the production type. But
sometimes we use the same PCB for 2 production types. I don't want to
remember which parts on the BOM are needed for type A and/or type B. If all
the 'inteligence' is in the schematic and components, then I don't need to
rely on my memory if the project needs a revision. The intention of the
'examples' was only to explain the idea.

I will be back at 2 januari 2002, have a Merry Christmas,

Aalt Lokhorst (e-mail [EMAIL PROTECTED])

address:
  Schut Geometrische Meettechniek bv
  Duinkerkenstraat 21
  9723 BN  Groningen, The Netherlands
  tel. +31 50-5877877
  fax. +31 50-5877899



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[PEDA] Want to know which program created some .PCB files

2001-12-21 Thread Ian Wilson

Hello all,

We have been given responsibility for a large suite of technology from a 
defunct US company (once owned by Cadence).  The schematics are in OrCad 
capture (DSN) format, but the PCBs are unknown.  I thought either OrCad 
Layout or Cadence Allegro but neither creates *.PCB files.

Inspecting the binary PCB files gives no apparent clue (no helpful text 
string embedded anywhere that gives any clues).

So what mainstream, and probably high end, programs create PCB files with a 
.PCB extension.  I have reason to believe that it was hosted on Windows but 
even it may have been a Unix variant.

It is not an option to send out a sample file (at least until we get 
through the pile and find some of the low-IP test jigs).

Not much to go on I know but has any one got any ideas?

Many thanks and for those that celebrate different occasions at this time 
of year, have a good one,
Ian Wilson

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[PEDA] Meetings

2001-12-21 Thread Sean James

Has anybody ever thought about having local meetings for Protel users?  This
way we can put a face to the people in the forum, and to exchange
information.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Want to know which program created some .PCB files

2001-12-21 Thread John Williams

Have you tried Pads PowerPCB?


John Williams



At 09:03 PM 12/21/01 +1100, you wrote:
Hello all,

We have been given responsibility for a large suite of technology from a 
defunct US company (once owned by Cadence).  The schematics are in OrCad 
capture (DSN) format, but the PCBs are unknown.  I thought either OrCad 
Layout or Cadence Allegro but neither creates *.PCB files.

Inspecting the binary PCB files gives no apparent clue (no helpful text 
string embedded anywhere that gives any clues).

So what mainstream, and probably high end, programs create PCB files with 
a .PCB extension.  I have reason to believe that it was hosted on Windows 
but even it may have been a Unix variant.

It is not an option to send out a sample file (at least until we get 
through the pile and find some of the low-IP test jigs).

Not much to go on I know but has any one got any ideas?

Many thanks and for those that celebrate different occasions at this time 
of year, have a good one,
Ian Wilson


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Re: [PEDA] special board requirements ??

2001-12-21 Thread Robison Michael R CNIN

mr. lomax:

thank you for your comments.  if a single board is unobtainable
or way too pricey, i will do like you say and sandwich two 63mil 
boards onto a core.  i've posted another email on why i'd like
to avoid this.

is the 1-to-3 relationship between via width and via depth the
same for a thruhole pad?  

thanks, miker


-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 20, 2001 5:58 PM
To: Protel EDA Forum
Subject: Re: [PEDA] special board requirements ??


At 09:03 AM 12/20/01 -0500, Robison Michael R CNIN wrote:
i need a 330mil thick board with 70mil taken off of mirrored sections on
both sides.  i'm thinking a 100mil radius tolerance on the inside of the
milled corners, and probably +/- 5 or 10 mil on the milled edges.  the
size of the board is 12x7.

That's not a printed circuit board, that is a brick.

Because you are far outside standard board production, it may be much more 
cost-effective to make two boards and sandwich them around some board or 
other material in the middle. Vias can be skewers (I've seen this done for 
space-flight boards). If you really want to plate holes through 330 mil of 
board thickness, know that the rule of thumb is that hole plating starts to 
get dicey at about one-third the board thickness. i.e., over 100 mils in 
your case, though the rule of thumb might not apply with such large holes.

The sandwich approach, if the outer boards are standard 062 material, will 
give you close to the 70 mil section removal. This, too, should save on 
processing.

To do the whole thing in PCB material, the inner boards could be, say .125 
board material or other standard size or sizes to make up what you need; to 
save money, I'd have the inner boards have no copper at all, they would 
just be routed board blanks, drilled where necessary for skewers, and I 
would glue the stack together. If the inner boards have copper pads, 
however, skewer wires, when soldered, could hold the stack together.
[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] special board requirements ??

2001-12-21 Thread Frank Gilley

Michael,

This 'lil project of yours raised an eyebrow over here, so I decided to ask 
my favorite prototype house if they could do this... and they said sure
So, you might want to give these guys a call.
I've had really good luck with them both on quality and prices, and I don't 
usually go around plugging boardshops.  Disclaimer:  I have never asked 
them to do anything like this :)

Prototron Southwest
520-745-8515
www.prototron.com

Good luck,

Frank



At 10:34 AM 12/21/2001 -0500, you wrote:
mr. lomax:

thank you for your comments.  if a single board is unobtainable
or way too pricey, i will do like you say and sandwich two 63mil
boards onto a core.  i've posted another email on why i'd like
to avoid this.

is the 1-to-3 relationship between via width and via depth the
same for a thruhole pad?

thanks, miker


-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 20, 2001 5:58 PM
To: Protel EDA Forum
Subject: Re: [PEDA] special board requirements ??


At 09:03 AM 12/20/01 -0500, Robison Michael R CNIN wrote:
 i need a 330mil thick board with 70mil taken off of mirrored sections on
 both sides.  i'm thinking a 100mil radius tolerance on the inside of the
 milled corners, and probably +/- 5 or 10 mil on the milled edges.  the
 size of the board is 12x7.

That's not a printed circuit board, that is a brick.

Because you are far outside standard board production, it may be much more
cost-effective to make two boards and sandwich them around some board or
other material in the middle. Vias can be skewers (I've seen this done for
space-flight boards). If you really want to plate holes through 330 mil of
board thickness, know that the rule of thumb is that hole plating starts to
get dicey at about one-third the board thickness. i.e., over 100 mils in
your case, though the rule of thumb might not apply with such large holes.

The sandwich approach, if the outer boards are standard 062 material, will
give you close to the 70 mil section removal. This, too, should save on
processing.

To do the whole thing in PCB material, the inner boards could be, say .125
board material or other standard size or sizes to make up what you need; to
save money, I'd have the inner boards have no copper at all, they would
just be routed board blanks, drilled where necessary for skewers, and I
would glue the stack together. If the inner boards have copper pads,
however, skewer wires, when soldered, could hold the stack together.
[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

Frank Gilley
Dell-Star Technologies
(918) 838-1973 Phone
(918) 838-8814 Fax
[EMAIL PROTECTED]
http://www.dellstar.com

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Re: [PEDA] Want to know which program created some .PCB files

2001-12-21 Thread Brooks,Bill

Tango, and Accell used the .pcb file format.


Bill Brooks 
PCB Design Engineer , C.I.D.
DATRON WORLD COMMUNICATIONS, INC
3030 Enterprise Court 
Vista, CA 92083 
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 
mailto:[EMAIL PROTECTED] 
IPC Designers Council, San Diego Chapter 
http://www.ipc.org/SanDiego/
http://home.fda.net/bbrooks/pca/pca.htm


-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Friday, December 21, 2001 8:10 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Want to know which program created some .PCB files


Ian,
I did some work for a local company that was a spin-off of Nortel and ran
into the same problem. The schematics were in Cadence but the PCB files were
unknown. I found out later that they were created using a proprietary layout
program of Nortels. It seems that this program is created by Cadence but
something about it is different. My only option at the time was to rebuild
the PCB from the gerbers, which fortunately I had. I fear that this might be
the same case with you.
Regards,


-Original Message-
From: Ian Wilson [mailto:[EMAIL PROTECTED]]
Sent: Friday, December 21, 2001 3:03 AM
To: [EMAIL PROTECTED]
Subject: [PEDA] Want to know which program created some .PCB files


Hello all,

We have been given responsibility for a large suite of technology from a 
defunct US company (once owned by Cadence).  The schematics are in OrCad 
capture (DSN) format, but the PCBs are unknown.  I thought either OrCad 
Layout or Cadence Allegro but neither creates *.PCB files.

Inspecting the binary PCB files gives no apparent clue (no helpful text 
string embedded anywhere that gives any clues).

So what mainstream, and probably high end, programs create PCB files with a 
.PCB extension.  I have reason to believe that it was hosted on Windows but 
even it may have been a Unix variant.

It is not an option to send out a sample file (at least until we get 
through the pile and find some of the low-IP test jigs).

Not much to go on I know but has any one got any ideas?

Many thanks and for those that celebrate different occasions at this time 
of year, have a good one,
Ian Wilson

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[PEDA] Gerber file naming convention

2001-12-21 Thread Sean James

When Protel assigns gerber file name extensions (xx.gxx), what is the
rule for internal layers? I just did a 6 layer board, and the extensions
are. g10, .g1, .g2  .g5.
When you try to import either a single or batch file, Protel only allows a 3
character extension to be seen, and not a 2 character extension. Here are
the layer names and their filename extensions:
.G10 = -5V PLANE COPPER
.G5  = GROUND PLANE COPPER
.G1  = +3.3/+/-12V PLANE
.G2  = +5V PLANE





Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Want to know which program created some .PCB files

2001-12-21 Thread John Williams

At 08:54 AM 12/21/01 -0800, you wrote:
Tango, and Accell used the .pcb file format.


As do Protel, Zuken Cadstar, and Mentor Expedition (Veribest).

John Williams

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Re: [PEDA] Want to know which program created some .PCB files

2001-12-21 Thread Tony Karavidas

Why not cut the file in half and post it somewhere for people to view the
binary?



 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED]]
 Sent: Friday, December 21, 2001 2:03 AM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Want to know which program created some .PCB files


 Hello all,

 We have been given responsibility for a large suite of technology from a
 defunct US company (once owned by Cadence).  The schematics are in OrCad
 capture (DSN) format, but the PCBs are unknown.  I thought either OrCad
 Layout or Cadence Allegro but neither creates *.PCB files.

 Inspecting the binary PCB files gives no apparent clue (no helpful text
 string embedded anywhere that gives any clues).

 So what mainstream, and probably high end, programs create PCB
 files with a
 .PCB extension.  I have reason to believe that it was hosted on
 Windows but
 even it may have been a Unix variant.

 It is not an option to send out a sample file (at least until we get
 through the pile and find some of the low-IP test jigs).

 Not much to go on I know but has any one got any ideas?

 Many thanks and for those that celebrate different occasions at this time
 of year, have a good one,
 Ian Wilson


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Re: [PEDA] Want to know which program created some .PCB files

2001-12-21 Thread Tony Karavidas

Post the 1st half! :)

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Re: [PEDA] Good Dual head video card combination for Protel.

2001-12-21 Thread Steve Wiseman



On Mon, 17 Dec 2001, Harry Selfridge wrote:

 After much experimentation, we settled on dual-head Matrox cards.  They are
 very stable, and Matrox is constantly improving the firmware and
 drivers.  Update downloads are available on the Matrox website at
 reasonably frequent intervals - even for older cards.

Danger, Will Robinson! The Matrox drivers, at least unitil very recently
when I gave up trying, do _not_ work on twin-CPU machines. (I tend to run
twins, so I can have Specctra battering away in the background, but keep
on Protelling on the other).
  If someone knows a way round this, I'll be back to using Matrox like a
shot, but at the moment, I'm ATI-single-heading it. Grump...

Steve

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Re: [PEDA] Gerber file naming convention

2001-12-21 Thread Tony Karavidas

This has been a little screwy for a long time. UNTIL they fix it, you'll
have to rename the 2 digit files such as:

.g1 -- .g01

That allows the gerber read back to get them all.


 -Original Message-
 From: Sean James [mailto:[EMAIL PROTECTED]]
 Sent: Friday, December 21, 2001 10:00 AM
 To: Protel EDA Forum
 Subject: [PEDA] Gerber file naming convention


 When Protel assigns gerber file name extensions (xx.gxx), what is the
 rule for internal layers? I just did a 6 layer board, and the extensions
 are. g10, .g1, .g2  .g5.
 When you try to import either a single or batch file, Protel only
 allows a 3
 character extension to be seen, and not a 2 character extension. Here are
 the layer names and their filename extensions:
 .G10 = -5V PLANE COPPER
 .G5  = GROUND PLANE COPPER
 .G1  = +3.3/+/-12V PLANE
 .G2  = +5V PLANE





 Sean James
 PCB Designer
 Telecast Fiber Systems, Inc.
 102 Grove Street
 Worcester, MA 01605
 (TEL) 508.754.4858 x33
 (FAX) 413.541.6170



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[PEDA] Format of PIK file

2001-12-21 Thread M. Wahab




Re: [PEDA] Good Dual head video card combination for Protel.

2001-12-21 Thread Bob Wolfe

Steve,
Your source for danger??? Just a question how it was determined it was
really dual proc
that causes Matrox dual head problems. Its been a while too since I have
used
dual proc and the dual head set up but we never really got ant good info out
of Dell
or Matrox back then.

Robert M. Wolfe, C.I.D.
[EMAIL PROTECTED]

- Original Message -
From: Steve Wiseman [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, December 21, 2001 1:48 PM
Subject: Re: [PEDA] Good Dual head video card combination for Protel.




 On Mon, 17 Dec 2001, Harry Selfridge wrote:

  After much experimentation, we settled on dual-head Matrox cards.  They
are
  very stable, and Matrox is constantly improving the firmware and
  drivers.  Update downloads are available on the Matrox website at
  reasonably frequent intervals - even for older cards.

 Danger, Will Robinson! The Matrox drivers, at least unitil very recently
 when I gave up trying, do _not_ work on twin-CPU machines. (I tend to run
 twins, so I can have Specctra battering away in the background, but keep
 on Protelling on the other).
   If someone knows a way round this, I'll be back to using Matrox like a
 shot, but at the moment, I'm ATI-single-heading it. Grump...

 Steve


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Re: [PEDA] Want to know which program created some .PCB files

2001-12-21 Thread Douglas McDonald

What are the first few bytes of the files (10 or so). That shouldn't give 
any IP away! There might be a recognisable header...

Hello all,

We have been given responsibility for a large suite of technology from a
defunct US company (once owned by Cadence).  The schematics are in OrCad
capture (DSN) format, but the PCBs are unknown.  I thought either OrCad
Layout or Cadence Allegro but neither creates *.PCB files.

Inspecting the binary PCB files gives no apparent clue (no helpful text
string embedded anywhere that gives any clues).

So what mainstream, and probably high end, programs create PCB files with
a .PCB extension.  I have reason to believe that it was hosted on Windows
but even it may have been a Unix variant.

It is not an option to send out a sample file (at least until we get
through the pile and find some of the low-IP test jigs).

Not much to go on I know but has any one got any ideas?

Many thanks and for those that celebrate different occasions at this time
of year, have a good one,
Ian Wilson



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Re: [PEDA] multi sheet problems

2001-12-21 Thread Bob Wolfe

Dwight,
I believe it is the first one on the list of footprints it will actually put
on the board.
And the only one it will automatically put on the board.
In my situation I would really like an option to update automatically in one
shot all of the footprints in a board to what is in the library. I did talk
to Protel
about this and I understand their relunctance for this. It really is my
situation. Using global
edit is still too much work. I am taking in an Orcad schematic and what is
in the footprint
field on Orcad side is absolutely not what I want for footprint names and I
can't
get the person on the other end to change this. I am looking into mapping
some other field
in Orcad to the footprint filed in Protel, but been to busy to really look
into any other
options at the moment. Unless you hav eany other suggestions I really
want the system
to automatically see my footprints for the same symbol part number not his
coming in from
Orcad. Thanks for the help, but I really think there should be an update ALL
footprints
per library part option capability in one shot.
Bob
Robert M. Wolfe, C.I.D.
[EMAIL PROTECTED]

- Original Message -
From: Dwight Harm [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, December 21, 2001 3:22 AM
Subject: Re: [PEDA] multi sheet problems


 Bob,
 Two points about this --
 1) The list of footprints in the library symbol is merely possible
 choices -- you don't have to use any one of these.  So changing the
 footprint list in the library should NOT update all the footprints for
those
 symbols in the schematic.
 2) Use global edit if you really want to change all of them to the same
 (new) footprint.

 -Original Message-
 From: Bob Wolfe [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, December 20, 2001 6:15 PM
 snip
 I do however agree with the person
 talking about how Protel updates board and schematic from library, it is a
 little less than I had hoped for in my setup. I really wish the footprints
 would REALLY update all symbols from the library.
 It does but it will not use those new footprints on a board you need to go
 into the schematic for each
 unique part and force it to that new footprint. ie if you get properties
of
 the symbol you see
 a pulldown menu for footprint which now does contain the new part too BUT
 until you select the
 new footprint you will still see the old footprint on the board.

 Bob


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Re: [PEDA] Meetings

2001-12-21 Thread Abd ul-Rahman Lomax

I understand that the user group started with local meetings in the San 
Jose California area, but there have not been actual meetings for a long 
time, except for a few Protel-sponsored meetings at PCB Design Conference 
West and East.

Worcester is about an hour away from me and I'd be happy to attend a 
meeting in that area or even as far east as Boston. Local users are 
obviously free to organize meetings wherever, and I see no harm in using 
this Forum to publicize them. If it ever happens that local meetings become 
so numerous that publicizing them internationally on this list is a burden, 
we can use a calendar page on one of the protel-users lists on yahoogroups.com.

I'm also willing to attend user meetings outside the Mass./Conn. area, but 
I might be looking for expenses

It would be good for a local meeting to have a company sponsor which would 
provide a meeting place

At 10:15 AM 12/21/2001 -0500, Sean James wrote:
Has anybody ever thought about having local meetings for Protel users?  This
way we can put a face to the people in the forum, and to exchange
information.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


Abd ul-Rahman Lomax
LOMAX DESIGN ASSOCIATES
PCB design, consulting, and training
Protel EDA license resales
Easthampton, Massachusetts, USA
(413) 282-0013, efax (419) 730-4777
[EMAIL PROTECTED]


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Re: [PEDA] Good Dual head video card combination for Protel.

2001-12-21 Thread Brian Guralnick

I had my Matrox G400DH with my dual PIII 450Mhz Intel based mother board for 1.5
years.  The only problem I had was games did not play too smoothly.

If you tell me what your system configuration it, I can solve your Matrox headaches.



Brian Guralnick


- Original Message -
From: Steve Wiseman [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, December 21, 2001 1:48 PM
Subject: Re: [PEDA] Good Dual head video card combination for Protel.


|
|
| On Mon, 17 Dec 2001, Harry Selfridge wrote:
|
|  After much experimentation, we settled on dual-head Matrox cards.  They are
|  very stable, and Matrox is constantly improving the firmware and
|  drivers.  Update downloads are available on the Matrox website at
|  reasonably frequent intervals - even for older cards.
|
| Danger, Will Robinson! The Matrox drivers, at least unitil very recently
| when I gave up trying, do _not_ work on twin-CPU machines. (I tend to run
| twins, so I can have Specctra battering away in the background, but keep
| on Protelling on the other).
|   If someone knows a way round this, I'll be back to using Matrox like a
| shot, but at the moment, I'm ATI-single-heading it. Grump...
|
| Steve
|
|

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Re: [PEDA] Good Dual head video card combination for Protel.

2001-12-21 Thread Abd ul-Rahman Lomax

At 06:48 PM 12/21/2001 +, Steve Wiseman wrote:
Danger, Will Robinson! The Matrox drivers, at least unitil very recently
when I gave up trying, do _not_ work on twin-CPU machines. (I tend to run
twins, so I can have Specctra battering away in the background, but keep
on Protelling on the other).

Computers are cheap, really cheap, at least single-CPU computers are, so if 
I were so flush as to have a Specctra license, I'd seriously think of 
setting another box next to my system, putting in a keyboard and monitor 
switch -- unless I had extras and room for them -- and running Specctra on 
that. The network is the computer is a bit trite now, but I just upgraded 
my old 10MBPS ethernet to 100MBPS, which I should have done quite some time 
ago.

In fact, I am upgrading everything, I intend to write about it. Prices are 
*really* good, it's a buyer's market.

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Project woes

2001-12-21 Thread Abd ul-Rahman Lomax

At 02:36 PM 12/21/2001 +1100, Thomas wrote:
I have a 5 sheet project that I was planning to put on one PCB.
However It has become clear that there is no way all the parts are going to
fit in the space available.

To solve this I will have to stack 2 PCBs (there are mounting slots provided
for two PCBs in the enclosure).

The problem is that the most efficient way to do this requires all the
display parts on one PCB - the rest on the other. Unfortunately this is not
the way the schematic sheets are arranged. So it will be impossible to get a
netlist for individual PCBs.

What you want here is one schematic and 2 PCBs. Not necessarily a great 
idea unless the boards are truly conjoined twins, which is not the case if 
I understand the description (two mounting slots)

What I was planning to do was draw the two pcbs in one file connected
together and have a perforation or groove for splitting the two pcbs.

You could do this. In this case, you have not two pcbs but one. Only they 
get cut apart and the tracks cut replaced by ribbon. If you like, the 
interconnection tracks could be on a non-fabricated inner layer, so you 
won't even have the embarrassment of cut copper at the board edge.

  Placing correctly sized vias on a 2.54mm pitch for PCB interconnections on
both PCBs should allow me to use a  ribbon cable from another one of our
standard products.

Don't do it that way. Instead, add connectors to the schematic, two of 
them, matching the ribbon, even if the connectors are only a hole pattern 
for flat flexible cable or the like. A pattern of correctly sized vias I 
would call a footprint, and you can control this from the schematic if 
you place connector symbols Plus you probably already have the 
footprint from your other standard product.

I plan to annotate the schematics showing which parts are on the second PCB.

All this should still be quicker than redrawing the project.

You are going to have to decide what parts go on what PCB, and then ensure 
that the relevant signals communicate on the ribbon. That takes time. You 
might as well split the design into two parts. Seriously, that is probably 
the easiest way to do this.

I recommend this: take your existing schematic, and save it with a 
different name. Then split the original design into two schematics, you can 
use select, cut and paste to move parts and interconnection information 
from one to the other. Be careful about multipart ICs, if you have any! Be 
sure to place the interboard connectors, one on each schematic; it may be 
best to assign nets to the pins with net labels.

When you are done, add the two connectors with their net labels to the 
original schematic and generate a net list, I'll call it original.net. You 
will probably want to use net labels and ports global. If you have used 
some other scope for your original schematic, things get more complicated, 
I won't address that here.

Take your individual schematics and link them through a top-level project 
schematic. Make a project netlist, I'll call it split.net. Once again, net 
labels and ports global.

Use the Protel netlist comparison tool (It's under Reports in Schematic) to 
prove to yourself that both netlists are identical. If they are not, you 
have something to fix

Then design each PCB, one from each of the individual, non-linked schematics.

At this point you can choose to fab them separately or together. (If you 
fab them together, you may want to add the dummy interconnections on an 
unused inner layer I mentioned above, that way the whole design will DRC 
properly). If later you change one of them, you can just fab one instead of 
being forced to fab both at higher cost.

Also, with the individual sheets, you will be able to generate a BOM for 
each board, pick and place, etc.

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA


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Re: [PEDA] multi sheet problems

2001-12-21 Thread Abd ul-Rahman Lomax

At 06:26 PM 12/20/2001 -0800, Dennis Saputelli wrote:
but is it true that to use the synchronizer the schematics have to have
all the right footprints plugged into the sch symbol?

Someone else answered Yes. I don't think so. Uncheck Update Component 
Footprints in the Update PCB dialog.

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Easthampton, Massachusetts USA

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Re: [PEDA] special board requirements ??

2001-12-21 Thread Abd ul-Rahman Lomax

At 10:34 AM 12/21/2001 -0500, Robison Michael R CNIN wrote:
is the 1-to-3 relationship between via width and via depth the
same for a thruhole pad?

 From a fabrication point of view, more or less, a via = a thruhole pad. 
The plating process is the same.

On the subject of cost, it sounds like it may be possible to fab this as 
two single-sided PCBs plus one blank. In other words, cheap. All boards 
would be drilled with the same holes, unless you want vias on one board 
only (in which case you have one or two two-sided boards on the outside). 
Still, you are falling into a standard fab type, you can use Advanced 
Circuits protos for example. I.e., supercheap.

Properly designed matching holes on the boards can be used as tooling 
holes, so registration accuracy between the two sides would be almost 
automatic.


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