Re: [PEDA] Broken Port Symbols In Protel 99 SE SP6 ..HELP!!!

2002-12-16 Thread John Branthoover
I have no idea how the OrCad ports got enabled. I have not loaded any OrCad schematics to my knowledge. Must have been operator error? -Original Message- From: Andrew Jenkins [mailto:[EMAIL PROTECTED]] Sent: Sunday, December 15, 2002 4:40 PM To: Protel EDA Forum Subject: Re:

[PEDA] Bill of Material Report Problem

2002-12-16 Thread Steve Smith
Hi, I was trying to generate a Bill of Material (BOM) report for a schematic and got: An EAccess Violation error occurred in BOMDLL.DLL This is not a new schematic. I had generated BOMs before with no problems. I have 99SE with SP6. The schematic is in a MS Access Database format and is in

Re: [PEDA] Bill of Material Report Problem

2002-12-16 Thread Brad Velander
Steve, I had this very same problem not that long ago. The problem seems to be something in the .cfg file. I went through umpteen re-installs and other trials trying to solve the problem but it only went away when I deleted all non-essential files including the .cfg file. At the time

Re: [PEDA] Bill of Material Report Problem

2002-12-16 Thread Brad Velander
Steve, I haven't received that Protel mailing yet. Protel mailings with me are sort of hit and miss. I commonly hear about mailings on this list but never receive them myself even though I know Protel has all my current contact info. Sincerely, Brad Velander. Lead PCB Designer Norsat

[PEDA] PCB Layout Tricks to help identify Lemmon PCB's.

2002-12-16 Thread Brian Guralnick
Hi Everyone, Last year, I had a run of 1000 PCB's (4 layer) where 80% initially passed QC, then 90% of the pass PCBs failed after a few days of use. After exhaustive investigation, I cut right through the PCB with a huge pair of scissors. It turned out the PCB's middle layers had around

Re: [PEDA] Virtual Short

2002-12-16 Thread Abd ul-Rahman Lomax
Mr. Wilson has ably answered the questions, I have a little to add. At 08:26 PM 12/15/2002, you wrote: On 08:44 PM 15/12/2002 -0400, Tim Fifield said: Can anyone explain the Lomax virtual short used for a GND neck and how it would be used on an internal layer with 2 polygon planes? Can this be

Re: [PEDA] Virtual Short

2002-12-16 Thread Tim Fifield
I think I figured it out. What I did was just create a clearance rule for those two specific net names for the 2 pads. Then I just connected the pour with copper fills. It's not real pretty but I think it will work. Thanks Ian for your help. Tim -Original Message- From: Tim Fifield

Re: [PEDA] Virtual Short

2002-12-16 Thread Brad Velander
Tim, sounds like there are two possibilities for your problem. 1) The nets attached to the two pads don't match the polygon pours. 2) The polygon settings do not have the Pour over Same net checkbox checked. I am betting on the latter of those two. You may have to do a

Re: [PEDA] PCB Layout Tricks to help identify Lemmon PCB's.

2002-12-16 Thread ttontis
use IPC 2221, and use the coupons. This will allow you to follow the build up of layers through plating and drilling. Any destructive testing can be done on these avoiding having to destroy a sample of the production board. Regards, Ted -Original Message- From: Brian Guralnick

Re: [PEDA] PCB Layout Tricks to help identify Lemmon PCB's.

2002-12-16 Thread Brad Velander
Brian, yes there are various IPC coupons that can be used for all of your issues. However in order to proper inspect those coupons you will have to have the fabricator perform microsections (as opposed to you having to slice the board) for you to verify the build. Sorry I don't know the

Re: [PEDA] PCB Layout Tricks to help identify Lemmon PCB's.

2002-12-16 Thread Brian Guralnick
specific names of the IPC coupons, but your fabricator should. Sounds like you your QA need a long chat with your fabricator, somewhere there is something seriously awry. Sincerely, Brad Velander. He was sued had to pay for my company's loss. I'm just trying to avoid such a problem in

Re: [PEDA] PCB Layout Tricks to help identify Lemmon PCB's.

2002-12-16 Thread HxEngr
In a message dated 12/16/2002 2:30:48 PM Eastern Standard Time, [EMAIL PROTECTED] writes: Last year, I had a run of 1000 PCB's (4 layer) where 80% initially passed QC, then 90% of the pass PCBs failed after a few days of use. After exhaustive investigation, I cut right through the PCB

Re: [PEDA] PCB Layout Tricks to help identify Lemmon PCB's.

2002-12-16 Thread Brad Velander
Brain, as Ted had mentioned there are a bunch of them specified in IPC-2221. In my version (Feb 1998) it starts at page 79 or 80. There area number of specimens, most do not have specific purposes that match your desired function but several would act as suitable indicators if

Re: [PEDA] Virtual Short

2002-12-16 Thread Ian Capps
Tim Instead of using fills go to your design rules, manufacturing, Polygon connect style. Set up a new rule for component, VS???, Direct Connect. This should give you a complete pour over the pads. Ian Capps - Original Message - From: Tim Fifield [EMAIL PROTECTED] To: Protel EDA Forum

Re: [PEDA] Assembly Drawing Instruction on TO 220

2002-12-16 Thread Guy Porritt
It's also worth specifying the pins to be bent around a certain radius *away* from the neckdown; bending them too close, or allowing the leads to bend naturally at the neckdown without a nice formed radius, makes the swiny things fall off at the stress raiser caused by the sharp bend,