, but others may.
Ian Wilson
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and installing P99SE and the service pack should proceed OK and
this installation will/should fix up the mess made in step 5.
Worked for me.
Ian Wilson
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5 The Crescent, Chatswood, NSW, 2067
Australia
Ph: +61-2-9411-4248 Fx: +61-2
On 02:58 PM 1/03/2001 +1100, Geoff Harland said:
- (Pcb Server): Add support for *resizing* of a currently-focused fill
primitive using the *mouse*. That is, if you click on an edge or corner of a
currently-focused fill, then you can change the location of that (by
dragging it with the mouse)
stuffing up your
service pack installations.
Should fix your problem.
Ian Wilson
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deleted from a PCB? In a number of
cases where I had this phantom connection I do not recall using arcs in
that area but maybe I had.
Can you give more details on this please? This would be a worthwhile bug
to try to track down.
Ian Wilson
On 03:09 PM 5/03/2001 -0700, Eric Albach said:
There are two ways to delete an object. One is to select it and the clear
the selection.
Select and clear is the only reliable way to for me to delete an arc.
I just tried it and I found no problems using single-clicks to cause arcs
both large
On 10:10 AM 6/03/2001 +1100, John Haddy said:
By definition, 1 inch = 25.4mm exactly. This was standardised
some decades ago.
It's when rounded numbers are used that problems occur.
Cheers,
John Haddy
Off topic a little...
But the metre (and hence inch) are derived quantities (variables) so
On 03:57 PM 5/03/2001 -0700, Eric Albach said:
After much fiddling with schematic arcs I found part of the problem and
solution.
The problem is only with Circles, not partial circles (arcs). When creating a
circle using the mouse the default Start Angle and End Angle are both set to 0
(certain
.
At 10:38 AM 3/6/01 +1100, Ian Wilson wrote:
It is a bug - 0 to 0 should either display as an invisible arc or be
identical in behavior to 0 to 360 (I prefer the latter). It should not
display as per 0 to 360 but behave differently.
Both a zero length track and a zero length arc should display
On 01:52 PM 7/03/2001 +1100, Geoff Harland said:
Using 2/3 of an inch or .67 of an inch, its obvious which one is the more
accurate. Maybe fractions rather than rounded decimals used in conversions
would allow better accuracy.
Clive Broome
In other words, rational numbers (i.e. the
padstacks.
Ian Wilson
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On 11:21 AM 9/03/2001 -0800, Phillip Welsh said:
I am a new user with Protel. I finally found out how to make my own
footprints with the wizard. But I have a three-conductor 3.5mm Phone jack
for headphones I can't find the footprint for. There is a figure for it in
the schematic libraries
On 07:28 PM 10/03/2001 -0500, Brian Guralnick said:
I though I did direct this email to the developer list. Also, I did not
get my own message back like I'm used to. Has the forum email addresses, or
subject line header changed?
_
Brian Guralnick
The forum admin has swapped
On 07:28 PM 10/03/2001 -0500, Brian Guralnick said:
...snip... Also, I did not
get my own message back like I'm used to. ...snip...
_
Brian Guralnick
There is new capability in the new list servers - one is the ability to
*not* receive your own posts to the lists. I was wondering
G'Day,
The Protel Users file area has a new server.
This server allows you to set the testpoint state of selected pads and
vias. There is no on-line help so keep this email if you want to use it.
(Geoff Harland please don't hassle me about this - you are good at
documenting your servers I
On 04:04 PM 10/03/2001 -0500, Brian Guralnick said:
Hi,
I was wondering if it was possible to modify the schematic PCB? I
noticed on Protel's site, they talk about making a server for the design
explorer. I'm interested in adding some additional coordinates to be
displayed on the status
On 08:33 PM 10/03/2001 -0800, Jim Mcgrath said:
repro proteledaforum on
To get your own mail being sent to you, you must send the request to
mailto:[EMAIL PROTECTED] (not the forum)
with the command in the body of the message:
repro proteledaforum on
Ian
* * * * * * * * * * * *
will not get errors as
you describe. So a bottom side surface mount component will not be flagged
as fouling with a top side through-hole component and visa-versa.
Ian Wilson
Fabe
Guigne International Limited
Paradise, Newfoundland
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On 10:18 AM 13/03/2001 +0100, Rudolf Schaffer said:
Hello,
One more time i'm searching for help!
-1- I have a prototype PCB1 totally routed.
-2- I want to copy a region with connected components
from PCB1 into a new design.(with 100% loaded components and
netlist)
-3- How to proceed?
On 12:32 PM 14/03/2001 -0800, Abd ul-Rahman Lomax said:
At 08:29 AM 3/14/01 +, Coleman, Tim wrote:
With regard to power pins on multiple part components(or even large single
part components like a uP or memory). We create a 'power part' that has just
the power pins and any NC pins. This
is not multilayer.
Ian Wilson
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of the
odd rounding error - 95.0001mm is near enough to 95.0 for me.
Ian Wilson
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do me as well.
Ian Wilson
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On 12:13 PM 22/03/2001 -0500, Bagotronix Tech Support said:
My question is: do I have to install the old Protel software on my new PC
before I install the 99SE upgrade?
No.
Ian
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Is anyone else seeing very long lag times?
I posted some stuff that is taking hours to get through. Could be my mail
server I s'pose but everyone else I have posted to has received it in good
time.
Is the system going OK for everyone else? I tried the auto-test system
status and there was
On 11:05 AM 26/03/2001 +0100, Cliff Lawrence said:
Hi all,
Is there any way of storing irregular or custom pad shapes / definitions
in Protel. I often have a requirement for placing odd shaped pads on
footprints and it would be nice if they could be directly placed from
the Place menu rather than
designs
to a cra.
Ian Wilson
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in file size and slow down in redraw. Everything would be exported
as 0 thickness and pads/vias etc would not be filled (just arcs showing the
copper annulus and hole size).
Ian Wilson
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set of libraries. You will
rapidly get to a point where you are only creating a new symbol/footprint
occasionally.
(I use A/K, C/E/B, D/G/S, etc for my sch symbols pin numbers.)
Ian Wilson
On 04:27 PM 3/04/2001 -0600, Eric Albach said:
I've been having minor errors doing a schematic to PCB
the PCB edge onto the used plane layers (see
Paste Special command) and fatten up to say 50 mils is usually
enough. Deal with any special features such as break-off tabs etc to
ensure the copper plane is pulled back from them.
Ian Wilson
On 09:50 AM 6/04/2001 +0200, Aalt Lokhorst said:
Ian Wrote:
Hello Ian,
Now I understand what you mean.
I see the 'hooroo' greeting as long as i can remember so i was wondering how
it was possible that such an Protel expert did not know about the redraw
'End' key. I should know better before
are heading into
unknown territory.
Protel have been informed and can replicate the issue. Hopefully this will
be a SP7 fix.
hooroo,
Ian Wilson
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made my dimensioning and
export-to-industrial-designers life much easier and more accurate. As well
as making my mech CAD program fly.
Ian Wilson
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On 04:00 PM 6/04/2001 +0200, Ben Uytenhaak said:
Hello,
I think this is the solution to your problem:
1) place the pad
2) double click on the pad
3) check the Past Mask Override checkbox
4) enter value higher than half the pads x- and/or y-size
5) click ok
If I'm not correct please somebody else
On 09:37 AM 9/04/2001 +0100, [EMAIL PROTECTED] said:
Ian Wilson wrote:
On 04:11 PM 6/04/2001 +0100, [EMAIL PROTECTED] said:
Solder masks are treated like power planes in Protel. The same applies to
paste masks. Anything you place on these layers shows up negativ on the
board. Place a fill
the magi-handle I think).
Ian Wilson
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worth looking into.
Personally, I disagree that it is worth looking into - I think it can only
take Protel further from improving the visibility of the design.
Ian Wilson
Considered Solutions Pty Ltd mailto:[EMAIL PROTECTED]
ABN: 96 088
On 05:06 PM 10/04/2001 -0600, Gladieux, Jed said:
Does anyone know how to create new design rules. For example, I would like
to flag instances where component outlines on the silkscreen layers overlap.
I got bit by this on a very busy board and wound up with 2 components
physically interfering
model.
Ian Wilson
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solder mask width (a bit like checking for internal plane
connectivity)
2) Overlay near pads (as you mentioned)
3) others
bye for now,
Ian Wilson
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, does not have the full check mode and it doesn't have the
same method of setting component clearance. Anyway P99SE should go someway
to trapping your problem.
Ian Wilson
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a bus entry (just need to sort out the
net label text alignment issues).
I don't like these suggestions as much as simply allowing busses to support
more complex naming or a new net collections entity that interfaced to sch
net classes and rules.
Ian Wilson
the measurement format
(correctly). SolidWorks is one program whose output I have needed to
massage in the past.
Ian Wilson
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annotations to simply document additional
information as you wish.
I have a question though - how does multiple netnames and a scope of Nets
and Ports Global make a sch more legible?
Ian Wilson
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otherwise the archive takes up about 25% more space than it need.
In essence there is no archive and even though users have been baying for
one for ages and some (me) have done various cludges we still do not have
one after much waiting. All other mailing lists I am on have an archive.
Ian Wilson
- yikes!
Ian Wilson
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). If they move then they are considered connected
otherwise the system has not made the connection.
Ian Wilson
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contract manufacturers.
Ian Wilson
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library documents contained in the DDB, just the DDB itself.
I thought this artefact of the MS-Access Jet DB engine is one reason the
DDB file can be a pain for those using CVS and similar systems for managing
sch/pcb/libs.
Ian Wilson
- in all cases.
2) prevent the autorouter from ripping up copper tracks that are part of a
component. (Component copper fills are not ripped up.)
Ian Wilson
___
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5 The Crescent, Chatswood, NSW, 2067
Australia
Ph: +61-2-9411-4248 Fx: +61-2
garbled responses - how you do not end up
excessively confused...
Ian Wilson
At 02:57 PM 9/07/01 +1000, you wrote:
Greetings all,
How do I unlock component strings ?
I didn't even know they could be locked.
I am editing a legacy design using 99SE+SP6 (somebody else started
an option box to control what
entities are included in the expanded selection. Maybe maybe maybe...but
not by me at this time (anyway), anyone else want a go?
Ian Wilson
On 02:37 PM 9/07/2001 +0200, Joop Reekers said:
Hi All,
I stumbled on a problem, trying to copy a part of a PCB design
On 10:28 AM 10/07/2001 +1000, Linden Doyle said:
OKgot it now!
Saving as an ASCII (V2.8) file as per Ian's recommendation but couldn't find
the record that corresponded to the locked (or other) attributes.
It works if you save as an ASCII V3 format (not V2.8 format) - then you
will see all
...
Ian Wilson
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the manufacturing documentation in existence
that means we do not want to monkey will all the designators - just as few
as possible. But do not read any of this as saying the bug is not an
important one to fix.)
Ian Wilson
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At 02:35 PM 11/07/01 -0700, you wrote:
At 09:43 PM 7/11/01 +1000, Ian Wilson wrote:
Does sound like a bug - I will await other comments before adding it to
the bug database. I suppose someone will try to call it a feature...
It's not a bug, in my opinion, but neither is it a feature. The lack
that you cannot be sure the short occurs in the area you
want. Since it can't do this I have never investigated if the rule
actually works. I for one have been asking for better scopes on the Allow
Short Circuits rule since the very first time Protel introduced the rules
based system.
Ian Wilson
disclosure of the experimental
conditions.
Ian Wilson
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on this forum some months ago.)
You do not need to take just my word for this -
http://www.protel.com.au/earticles/design_synchronization.htm
Rant mode over and out,
Ian Wilson
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wires here? I do not like adding things to
the bug database unless they are clearly bugs.
Bye for now,
Ian Wilson
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as it is
irritating and it is good to know what the cause is.
Thanks,
Ian Wilson
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synch'ed throughout the design, I think you will
find the design flow much better. If you use the Synchronizer it is
important that you make the component matches correctly - the is initially
done by designator.
Ian Wilson
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of a nightmare. Congratulations.
Ian Wilson
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promise I am not emotionally attached to it.)
Ian Wilson
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On 08:55 PM 24/07/2001 -0700, Abd ul-Rahman Lomax said:
As I stated, I do prefer that we move this discussion to the new list,
[EMAIL PROTECTED]
You may prefer but the vast majority if people responding do not want
another mail list it seems...
Ian Wilson
is a huge boon
2) full control of layer and tenting
3) testpoints can usually be located off vias (which one board stuffer has
informed us is their preference where possible as it reduces the incidence
of via barrels damaged by test probes).
Ian Wilson
On 10:21 AM 1/08/2001 +1000, Thomas said:
Having trouble obtaining the file from the location specified (Host not
found). Wouldn't even find http://www.considered.com.au
As someone else has reported that it works for them, I suspect it's because
our firewall is tighter than a fishes bum.
Would
Some things that could be better with the CSFlipView server:
1) Optionally be able to restrict the stuff that is flipped to just the PCB
client window. Messy to program as I would need to track when the PCB
window is no longer active
2) Fix the occasional bug where having the flip window open
for pin names and numbers.
Ian Wilson
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be arranged (if possible).
Thanks,
Ian Wilson
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think it should work.
Ian Wilson
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One point on the subject of DWG/DXF export of a PCB.
I find it is best to:
1) Save the file I am about to export (and save a copy to a new name)
2) Globally set track, arc (and string) widths to zero
3) remove heaps of extraneous stuff - like most of the copper tracks which
are of no
with inverting PCBs.
You can find the server in the Files area of the Protel-Users Yahoo
site. Link is below but I think you need to be a member of Yahoo Groups to
get it.
http://groups.yahoo.com/group/protel-users/files/CitelTools%28RePourAllPolys
%29.zip
Ian Wilson
On 07:07 PM 14/08/2001 -0400, Bagotronix Tech Support said:
Hello, all:
I got a strange message when exiting Protel 99SE today. The message is:
Program error
Client99SE.exe has generated errors and will be closed by
Windows. You will need to restart the program.
Funny as you were closing it.
being isolated from a noisy digital supply (but at
the same voltage) I tend to use a few open tracks on the internal plane to
control current paths to keep the analog ground locally clean.
All the best,
Ian Wilson
Bye for now,
Ian Wilson
the specialized customisations can be shared.
Yuri, is the article available?
Sounds good,
Ian Wilson.
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in reverse date order - but no luck for me.
Ian Wilson
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shortest length possible (direct
path). Such a report does not exist. Could presumably be made with a
server but it doesn't exist now.
Ian Wilson
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).
Not much joy but maybe something for Protel to consider and others to pick
holes in and come up with better solutions.
Hooroo,
Ian Wilson
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telling
Protel to deal correctly with single pin nets.
Ian Wilson
On 12:20 PM 22/08/2001 -0500, Ken Pelic said:
Protel EDA forum members,
In a P99SE design currently being wrapped up, we have a DRC error that is
something we want to do that generates an error we would like to not get
flagged. It would
On 05:19 PM 23/08/2001 -0700, John Williams said:
Take a look at:
http://www.aspiring-technology.com/prt_xrf.html
John Williams
Brian Guralnick wrote:
I remember once awhile back, an automated sheet entry generator server
was once
mentioned in this news group. Perhaps somebody
and sits back and watches) directed to US users...
Ian Wilson
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PROTECTED] and seeing where it gets me if the direct approach gets
nowhere.
Ian Wilson
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would arrive. I did not
subscribe, I do not want it, it is spam. I agree (from now) with AJ - lets
take this to another list. But I for have requested justification for
their actions and will be chasing their upstream providers.
Ian Wilson
At the bottom of this message you should be able to get the answers in the
thread.
Ian Wilson
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problems with Protel as you have to
flatten the design before xferring info into the PCB.)
I would suggest reworking the Sch carefully, to make it one label per
net. But as I say others may disagree.
Ian Wilson
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files are compiled from RTF files so maybe there is a tool to
convert back. Dunno if there is any copyright/legal issue with doing this
though, it may be considered reverse engineering under some weird law...
Ian Wilson
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or there is an form to lodge bug reports on their www site.
Ian Wilson
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of negative component
clearances to allow for overlapping components, I have an yone else want to
add a voice
Ian Wilson
Considered Solutions Pty Ltd mailto:[EMAIL PROTECTED]
ABN: 96 088 410 002
5 The Crescent
CHATSWOOD 2067
Ph
that they had done
their job well. It doesn't take much thought to figure that CAM output
will typically be generated multiple times in the final stages of preparing
a release.
I despair sometimes. I am waiting for the day when engineering is really
part of software engineering.
Ian Wilson
(I
if a via is at particular (small) distance from a 135 degree corner in
a fill.
If you find out what gives can you let us know, sounds like another poly
bug to me..
Ian Wilson
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Ian Wilson
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constraint rule and let me know I will get on and add the report to
the bug list. I have about 10 bugs and possible bugs to add I think at
this stage, all reported over the past couple of months on this list, but
not yet added to the bug list.
Ian Wilson
hosted is another discussion that will no doubt get a lively
discussion going (my thought www.protelusers.net - but that doesn't
exist...yet. protelusers.net should no be tied too closely to any company.
Ian Wilson
Considered Solutions
On 02:17 PM 6/09/2001 -0700, Abd ul-Rahman Lomax said:
At 09:10 AM 9/6/01 +1000, Ian Wilson wrote:
I am searching (part time) for a better method of maintaining the bug
list. I am thinking something along the lines of the Bugzilla project as
used by the Mozilla people (http://www.mozilla.org
be shuffled off to one of the various OT
lists.
(Speaking of OT lists: there is a smattering of traffic on the OT lists
that would be more appropriate on one of the main lists - there is some
mail-list confusion out there.)
Ian Wilson
PS: Just so the admin knows exactly who I am - I subscribe
mail to yourself back on. Somewhere on the
Techserver forums page there is a user options settings link, I think.
Ian Wilson
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it is good at. It deals with the Gerbers, so doesn't try to get too smart
with rules and layer stack-ups. This is what I'd do, I think, even though
I have been panelising in Protel for years.
Ian Wilson
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the *99SE.ini files in the Windows install
directory.
Ian Wilson
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did not try saving and re-opening the PCB file or the DDB. Tech
support can do this (they have been CC'ed on this mail). The fix is
presumably to improve the ability to check for entities on a layer before
allowing that layer to be disabled.
Ian Wilson
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