[PEDA] BAS FILES

2002-04-02 Thread Sean James

How do I run 3rd party .bas files?

Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170
www.telecast-fiber.com


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[PEDA] Voltage standoff of FR4

2002-03-18 Thread Sean James

What is the voltage standoff (front to back) for .062 FR4?

Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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[PEDA] Plug switch

2002-03-15 Thread Sean James

I'm doing a power supply with a hard-wired plug  switch. What type of pads
should I use so I can wire these parts on an internal layer, in order to
satisfy the netlist?

Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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Re: [PEDA] Is it a bug, or me?

2002-03-14 Thread Sean James

Is there any add-on routine to tweak the coordinates back?
- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, March 12, 2002 11:56 AM
Subject: Re: [PEDA] Is it a bug, or me?


 Protel has a few problems with mm and inches. I've often seen small
rounding
 errors creep in, and although I don't have any evidence, I have suspected
it's
 got something to do with repeatedly switching the units diplayed.

 I've heard hearsay that Protel prefers to work in imperial units.

 Andrew Ircha


 -
 This mail sent through IMP: http://horde.org/imp/




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Re: [PEDA] Is it a bug, or me?

2002-03-14 Thread Sean James

I get the same results when I cut  paste a cell to do multiple circuits.
- Original Message -
From: Bob Wolfe [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Thursday, March 14, 2002 7:06 AM
Subject: Re: [PEDA] Is it a bug, or me?


 So far I have only seen this when I have selected and moved a bunch of
 parts,
 if I then double-click the part the coordinates are all of a sudden out to
6
 places.
 I am woring im metric but also use basic increments like 0.1mm for all
 grids.
 I pretty much do not change between units display.
 Robert M. Wolfe, C.I.D.
 [EMAIL PROTECTED]

 - Original Message -
 From: Dan Beaudoin [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Tuesday, March 12, 2002 11:26 AM
 Subject: Re: [PEDA] Is it a bug, or me?


  It's a bug.  I've been having the same problem for quite a while.  I
think
  it may happen when the grid is changed from mils to mm and then back,
but
  I'm not sure.
 
  - Original Message -
  From: Sean James [EMAIL PROTECTED]
  To: Protel EDA Forum [EMAIL PROTECTED]
  Sent: Tuesday, March 12, 2002 8:09 AM
  Subject: [PEDA] Is it a bug, or me?
 
 
   Why do components and their pads magically have coordinates that are
  either
   xxx.999 or xxx.001? I'm working on a .5 mil grid, with a .5 mil
 component
   grid, and a 5 mil electrical grid. It's very aggravating.
   Sean James
   PCB Designer
   Telecast Fiber Systems
   102 Grove Street
   Worcester, MA 01603
   TEL 508-754-4858 x33
   FAX 413-541-6170
  
  
 




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[PEDA] Power connectors

2002-03-14 Thread Sean James

I'm trying to find a high voltage board to board connector. Any help would
be appreciated.
Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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[PEDA] DOS based line width calculator

2002-03-13 Thread Sean James

I lost this program when my OS crashed. Does anybody know where I can find
it again?
Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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[PEDA] +3V Power Port

2002-03-13 Thread Sean James

Does anybody have a +3V and a -2.5V power port schematic button graphic
created?
Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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[PEDA] Push shove

2002-03-13 Thread Sean James

Is there an easy way to toggle between Avoid obstacle and Push Obstacle?
Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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Re: [PEDA] Push shove

2002-03-13 Thread Sean James

Sometimes I get a little brain dead.
- Original Message - 
From: Tony Karavidas [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, March 13, 2002 3:53 PM
Subject: Re: [PEDA] Push  shove


 Shift-R
 
 (It's on the online help)
 
 Tony
 
 
  -Original Message-
  From: Sean James [mailto:[EMAIL PROTECTED]]
  Sent: Wednesday, March 13, 2002 12:30 PM
  To: Protel EDA Forum
  Subject: [PEDA] Push  shove
  
  
  Is there an easy way to toggle between Avoid obstacle and Push 
  Obstacle?
  Sean James
  PCB Designer
  Telecast Fiber Systems
  102 Grove Street
  Worcester, MA 01603
  TEL 508-754-4858 x33
  FAX 413-541-6170
  
  
 
 


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[PEDA] Is it a bug, or me?

2002-03-12 Thread Sean James

Why do components and their pads magically have coordinates that are either
xxx.999 or xxx.001? I'm working on a .5 mil grid, with a .5 mil component
grid, and a 5 mil electrical grid. It's very aggravating.
Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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[PEDA] Print dialog

2002-03-08 Thread Sean James

Is there a way to preset which layers to preview for a plot? It's not easy
when you have to add and delete layers one at a time. It would be nice to do
a regular Windows multiple select (holding down the Ctrl key while using the
left mouse button).

Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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Re: [PEDA] Pallets

2002-03-06 Thread Sean James

An array of PCB's.
- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, March 06, 2002 8:38 AM
Subject: Re: [PEDA] Pallets


 In a message dated 3/6/2002 8:31:36 AM Eastern Standard Time,
 [EMAIL PROTECTED] writes:


  I know this has been beaten around before, but I thought creating a
pallet
  in Protel when you have poured internal planes was OK. Or does Protel
just
  choke on pallets?
 

 (showing my ignorance...) What's a pallet? (in this context)

 Steve Hendrix




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Re: [PEDA] Trying to trace junk mail listing.

2002-03-04 Thread Sean James

Lloyd - Such language
- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, March 01, 2002 5:48 PM
Subject: Re: [PEDA] Trying to trace junk mail listing.


 I got it too!  #%#$@%@!!!




GE Energy Services
 __

 Lloyd Good
 Development Digitization

 Substation Automation Solutions
 General Electric Canada, Inc.
 2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
 Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
 Website: www.gepower.com/geharrisenergy/

 NOTICE: The information contained in this e-mail is privileged,
confidential
 and intended solely for the use of the addressee named above. If the
reader
 of this e-mail is not the intended recipient, you are hereby notified that
 any dissemination, distribution or copying of this e-mail is strictly
 prohibited. If you have received this e-mail in error, please notify me
 immediately by telephone (collect) at (1) 403.214.4400 and destroy this
 e-mail as well as any copy. Thank you.



 -Original Message-
 From: Tony Karavidas [mailto:[EMAIL PROTECTED]]
 Sent: Friday, March 01, 2002 3:24 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Trying to trace junk mail listing.


 Nope.

  -Original Message-
  From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
  Sent: Friday, March 01, 2002 2:14 PM
  To: Protel EDA Forum
  Subject: [PEDA] Trying to trace junk mail listing.
 
 
  Has anyone else here got mail from e-teknet?  I've been
  especially careful,
  but, somehow, I got on their email list.
 
  
  Brian Guralnick
 




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[PEDA] Pads with rectangular or square cutouts

2002-02-27 Thread Sean James

How do I specify a pad with a rectangular or square cutout? I'm using a
switch and a stereo phone jack that require rectangular and square mounting
holes respectively.

Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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[PEDA] VIAS

2002-02-26 Thread Sean James

Does anybody know of an easy way to sprinkle vias on a board? I want to
place several (100+) vias on a board to get a good top-bottom current flow
for GND.

Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170




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Re: [PEDA] help with a stack ??

2002-02-22 Thread Sean James

Just remember to balance you layer stack thicknesses to prevent the board
from being warped.
- Original Message -
From: Jon Elson [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Thursday, February 21, 2002 3:59 PM
Subject: Re: [PEDA] help with a stack ??


 Robison Michael R CNIN wrote:

  hello,
 
  i've got a negative (ECL) and a positive (TTL) power plane
  on a board i'm doing.  right now i'm figuring on a matching
  ground plane for each power supply, spaced close to the
  rail for switching capacitance.  here's the stack i'm
  thinking of:
 
  critical traces
  gnd
  -5.2V
  noncritical traces
  noncritical traces
  +5V
  gnd
  critical traces
 
  does this seem reasonable?  i have some semblance of controlled
  impedance with each trace layer referenced to a dc plane.
  other stacks suggestions are welcomed.

 Well, depending on how the board fabricator will actually assemble the
 book of laminates and prepregs, it should be doable.  I guess the
 critical
 thing is to make sure the critical traces and ground are etched from a
 double-sided laminate, then the non-crit traces and power will be on
 other
 laminates, so you end up with 4 double-sided laminates.  This could
 cause the noncritical traces to be awfully close together, but also the
 power and ground planes will be close together, giving more distributed
 capacitance.

 I have done a lot of ECL and mixed ECL/TTL/CMOS mixed analog/digital
 boards, mostly on 4 layers.  I generally have only one gnd plane and one

 split power plane.  Some of the power planes get very complicated, with
 interdigitated (zig-zag) voltage regions to bring power under the pads
 where it is needed.  Some of the inputs to these boards are pretty
 tightly
 controlled impedances, and so signals on one side are using the gnd for
 a ground plane, and signals on the other side use the power planes for
 ground plane.  I've never really had a problem with the ground plane
 issues.  I have had crosstalk, and had to completely re place one board
 to make the signal flow in, around and out without high level digital
 signals ever crossing over low level analog signals (this was on a
 6-layer
 board, so I ended up using two signal layers on one side of the
 power-gnd
 planes for analog, and the other side for digital.)

 For a board like you propose, I would try to use only one gnd plane, and

 use split planes for the + and - voltage supplies.  This might get you
 down to a 6 layer board, and cut costs.

  but i need both the ground planes common to each other.
  can i EVEN have two planes called GND?  is having two ground
  planes a bad idea?  if two ground planes is not a bad idea,
  then how do i tie them together?  NOTE:  if i tie them together
  i would like to do it in a way that doesn't mess up my design
  rules check.  i've noticed that additional vias and traces
  added to a pcb outside the schematic can make the design rules
  check flag them.

 Yeah, I think Protel may have a problem with this.  If you have 2
 planes assigned to net GND, then every via or through-hole that
 is assigned to net GND will probably have a thermal connection to
 BOTH planes.  This may be fine, electrically, but may cause problems
 in solderability, and certainly will drive techs doing any rework
 nuts.

  i have another question.  this is iffy, but i'm a heathen
  designer anyway.  this is just a proto board, and although i'd
  like controlled impedance, i don't want to pay for it.  SO,
  what i am thinking is that if i get an 8-layer board at the
  standard 62 mil thickness, that they are going to be just about
  forced to give me between 6 to 8 mils between layers, without
  me ever having to spec it.  does this sound right?

 I don't think a good board house will charge extra for this, if
 you figure it out in advance.  DON'T design the board in a vacuum,
 ie. figure out what you want and then submit the design.  Call
 the board fab of your choice, and get them to TELL YOU what
 they will use for laminate thickness for this build-up.  THEN, you
 just use that info to calculate trace width.  That way, your job
 fits in with their preferred flow.

 How tight a controlled impedance is this?  I routinely work with stuff
 where analog signals need controlled impedance of 50 Ohms +/- 1 Ohm,
 or there are serious reflections.  To keep ECL happy, you don't need
 that tight a control, especially if the traces are short.  +/- 10 %
 should
 be close enough, and that is much easier to provide.

 Jon





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[PEDA] Plotting Part Deux

2002-02-18 Thread Sean James

Is it possible to set up two instances of the same plotter with WIN2K? We
use an HP DesignJET 450C, and I would like to have one plotter' with
C-size, and the 2nd plotter at D-size.
Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170



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Re: [PEDA] Writing messages all day . . .

2002-02-15 Thread Sean James

Here's my two cents worth - $.02
- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, February 15, 2002 5:23 AM
Subject: Re: [PEDA] Writing messages all day . . .


 In a message dated 2/14/2002 9:16:10 PM Eastern Standard Time,
 [EMAIL PROTECTED] writes:


  Some people just seem to have a lot of free time on their hands . . .
 
 

 ... and some people are sufficiently thankful for all the time they've
saved
 through answers provided on this list, that they feel they ought to give
 something back by providing answers to others when they can.

 Steve Hendrix




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[PEDA] Paste Array

2002-02-15 Thread Sean James

What causes Protel to turn on all the layers  create a grid when I do a
Paste Array? How do I clear out the grid?


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Re: [PEDA] Paste Array

2002-02-15 Thread Sean James

Yes, it's Paste Special, Paste Array. the grid does seem to be imposed over
the paste area, but it doesn't go away.

- Original Message -
From: Brad Velander [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Friday, February 15, 2002 11:47 AM
Subject: Re: [PEDA] Paste Array


 Sean,
 could you explain a bit better. I have not seen anything which comes
 close to your description.
 You are talking about Paste Special, Paste Array in PCB aren't you?
 Is this grid a highlighted version of the normal grid dots/lines or is it
 something different imposed over the paste area?

 Sincerely,
 Brad Velander.

 Lead PCB Designer
 Norsat International Inc.
 Microwave Products
 Tel   (604) 292-9089 (direct line)
 Fax  (604) 292-9010
 email: [EMAIL PROTECTED]
 http://www.norsat.com

 See us at Booth 323 at Satellite 2002 in Washington, DC March 6-8.



 -Original Message-
 From: Sean James [mailto:[EMAIL PROTECTED]]
 Sent: Friday, February 15, 2002 6:39 AM
 To: Protel EDA Forum
 Subject: [PEDA] Paste Array


 What causes Protel to turn on all the layers  create a grid when I do a
 Paste Array? How do I clear out the grid?




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[PEDA] Move Component

2002-02-15 Thread Sean James

How do I default Move Component so that a component always jumps to the
cursor? (One of the options in the Choose Component dialog box).
Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170




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Re: [PEDA] Paste Array

2002-02-15 Thread Sean James

Yes.
- Original Message -
From: Brad Velander [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Friday, February 15, 2002 1:54 PM
Subject: Re: [PEDA] Paste Array


 Sean,
 I am at a loss, I don't see any hint of what you describe (not even
 temporarily). You are using P99SE SP6?

 Sincerely,
 Brad Velander.

 Lead PCB Designer
 Norsat International Inc.
 Microwave Products
 Tel   (604) 292-9089 (direct line)
 Fax  (604) 292-9010
 email: [EMAIL PROTECTED]
 http://www.norsat.com

 See us at Booth 323 at Satellite 2002 in Washington, DC March 6-8.



 -Original Message-
 From: Sean James [mailto:[EMAIL PROTECTED]]
 Sent: Friday, February 15, 2002 9:46 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Paste Array


 Yes, it's Paste Special, Paste Array. the grid does seem to be imposed
over
 the paste area, but it doesn't go away.





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[PEDA] Power ports

2002-02-14 Thread Sean James

Is there any way to change or create new power port symbols? (I would like
to create a square symbol).


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[PEDA] Schematic symbols

2002-02-14 Thread Sean James

Is there a way to have vertical oriented pins have horizontal pin names 
numbers?


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Re: [PEDA] protel routine

2002-02-12 Thread Sean James

Clive - That's the program I was looking for. Thank you.
- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Monday, February 11, 2002 5:49 PM
Subject: Re: [PEDA] protel routine




 The Qualecad website has a downloadable server that re-anotates selected
 components in both sch and pcb.


 Clive







 Mike Ingle [EMAIL PROTECTED] on 02/12/2002 04:14:11 AM

 Please respond to Protel EDA Forum [EMAIL PROTECTED]

 To:   Protel EDA Forum [EMAIL PROTECTED]
 cc:(bcc: Clive Broome/sdc)

 Subject:  Re: [PEDA] protel routine



 I once wrote something to do this, but it wouldn't install on anything
 beyond the system I wrote it on,  Anyway if there is such a routine out
 there, I also would be interested.

 PROTEL:  Do you hear this?  If heiachary really worked, and you could
re-use
 blocks thsi wouldn't be needed.



 Mike

 -Original Message-
 From: Sean James [mailto:[EMAIL PROTECTED]]
 Sent: Monday, February 11, 2002 5:11 AM
 To: Protel EDA Forum
 Subject: [PEDA] protel routine


 I lost the routine that changes a selected group of components on a
 schematic  raises the Ref Des' by a set increment (EX R1 to R101, etc).
 Where can I find it?










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[PEDA] protel routine

2002-02-11 Thread Sean James




Re: [PEDA] Win2000

2002-02-08 Thread Sean James

I had no choice but to move to WIN2000. My WIN98 OS self-destructed
yesterday
- Original Message -
From: Tony Karavidas [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Thursday, February 07, 2002 4:38 PM
Subject: Re: [PEDA] Win2000


 Just as a side note: a buddy of mine told me yesterday that Orcad doesn't
 even load on XP. That is version 7.x, and they are at 9.x now, but it
works
 fine on Win2K.



  -Original Message-
  From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
  Sent: Thursday, February 07, 2002 10:38 AM
  To: Protel EDA Forum
  Subject: Re: [PEDA] Win2000
 
 
  Summary of topic and recommendation:
 
  If you are running Protel 99SE on anything other than Windows 2000, get
a
  W2000 license and install it and use it. It may be a good time to
upgrade
  your computer, since W2000 installs much more easily on a fresh
  system than
  as an upgrade.
 
  I tried to upgrade one W98 computer to W2000 and failed. I upgraded an
NT
  system to W2000 without problems. And a new install was, like,
  fully automatic.
 
  XP is an unknown quantity theoretically it should be better,
but.
 
  [EMAIL PROTECTED]
  Abdulrahman Lomax
  Easthampton, Massachusetts USA
 
 




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[PEDA] Countersunk holes

2002-02-08 Thread Sean James




[PEDA] Win2000

2002-02-07 Thread Sean James

How well does Protel 99SE w/SP 6 work with Win2000?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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[PEDA] Keepouts

2002-02-05 Thread Sean James

I had the ability for a while to put filled keepouts down at 45 degrees. Now
I can't seem to get this function back. I tried using the 'shift- spacebar'
combo that's used to change track style, but that doesn't work.

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Protell99SE (SP6) missing diagonal pads off gerbers (sometimes) - bug?

2002-02-04 Thread Sean James

I have parts on a few of my boards that are rotated at 45 degrees. If I use
round pads, they photoplot OK. When I tried rectangualr pads, they were
drawn with a spiral pattern that looked like a rectangular pad. If you can
live with round pads on your parts, then use them. (BTW - Accel didn't have
this problem, if I remember).
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Steve Wiseman [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Monday, February 04, 2002 12:27 PM
Subject: Re: [PEDA] Protell99SE (SP6) missing diagonal pads off gerbers
(sometimes) - bug?



  Now, to the present problem. Here is what I suggest. Create a board file
  with just one of the pads in question. Plot it. Copy the gerber code
into a
  mail to the list. Describe the pad's characteristics fully, also
anything
  which might be relevant from the gerber setups.

 Unfortunately, neither my simple test board nor a copy  paste of the
 offending pads into a test pcb exhibits the fault. (and, naturally, the
 pcb in question is sensitive...). I'll keep trying to generate a test case
 that fails, but I've not managed to provoke it yet. It's notable that it's
 only the shunts that fail to plot - I've got some rotated capacitors that
 worked fine.

 Ah - an update. Copy  paste failed, but cut  paste worked. I've now got
 a small PCB that shows the behaviour. Any takers for a .pcb and .GBL?

 Steve




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[PEDA] Meetings

2002-02-04 Thread Sean James

Sorry I haven't gotten around to the subject at hand- I've been keeping the
mouse wheels burning. The building that I work in has a restaurant that may
accomodate us for a meeting in Worcester. Let me know how many would like to
attend and a date to meet. I'll set things up at the restaurant and let
people know of any costs involved. This restaurant has a great daily All
you can eat buffet at lunch time.

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Hanging Track

2002-02-01 Thread Sean James

Is that like a dangling participle?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Dave Babcock [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, February 01, 2002 11:02 AM
Subject: [PEDA] Hanging Track


 Hi All,

 Does anyone know how to detect a hanging track in PCB?  I. E. a track from
a
 via or pad that goes nowhere.

 Thanks again,
 Dave Babcock
 Chief Engineer
 Cardinal Components, Inc.
 email : [EMAIL PROTECTED]
 Phone: 973-785-1333x565
 Fax: 973-785-0053




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Re: [PEDA] Generating a report for pick and place machine

2002-02-01 Thread Sean James

Use the CAM manager in the File menu when you're doing a PCB.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: yves Dubois [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, February 01, 2002 11:20 AM
Subject: [PEDA] Generating a report for pick and place machine


Hi there,

I beleived that Protel 99SE SP6 is able to generate Pick and Place files. I
cannot find in the menus the command to generate such files.

Can Protel really generate such a file and if so How??


Thanks



Yves Dubois


Raytron LTD
Ville St-Laurent
Quebec, Canada



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Re: [PEDA] Hanging Track

2002-02-01 Thread Sean James

Nothing can beat the MK1 MOD1 eyeball. My last job, I had a boss and an
engineer constantly refuse to review my work, claiming that the software
should catch all the errors.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Andy Gulliver [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, February 01, 2002 11:47 AM
Subject: Re: [PEDA] Hanging Track


 Same here - it's amazing how much router fallout the Mk.1 eyeball can find
 :-)

 Regards

 Andy Gulliver

  -Original Message-
  From: Andrew Ircha [mailto:[EMAIL PROTECTED]]
  Sent: 01 February 2002 16:28
  To: Protel EDA Forum
  Subject: Re: [PEDA] Hanging Track
 
 
  If you find out let use know :-)
 
  These get picked up by our PCB house, who, with our permission, scratch
  them off the gerber data. Sometimes they're required in our designs, but
  not often.
 
  There isn't a single tool I'm aware of that will spot these, but you
could
  try a combination of viewing in single layer mode and setting
  pads to draft
  so that tracks show up more obviously. Other things you can do are to
  select each net in turn in the PCB explorer and zoom into it to see if
you
  can see any straggling lines, or if the net looks peculiar in any way -
I
  use this more to get rid of silly loops.



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[PEDA] Schematic

2002-01-30 Thread Sean James

Has anybody used the Increment part Number in a schematic? I don't see it
loaded in the server list, and it doesn't seem to work in a schematic.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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[PEDA] Pad calculations

2002-01-25 Thread Sean James

Does anybody have a program or spreadsheet to calculate pad diameters and
thermals? I had one from the PCAD forum.

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Camtastic

2002-01-23 Thread Sean James

Wayne -Where can I find the 2 products that you mentioned?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Wayne Trow [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, January 23, 2002 2:03 PM
Subject: Re: [PEDA] Camtastic



 Shawn,

 In my opinion CAMtastic is a lemon.

 I use Isolator 3.3.0 (a graphicode product - same as gc-prevue) for my
 CAM-ing. Isolator is old now, superceeded by GC-CAMEdit and
 GC-PowerStation (also by Gaphicode) but it does absolutely everything I
 need where as CAMtastic lacks features that I need for our system.

 I have dabled in CAMtastic - I had to draw up a report comparing several
 different CAM packages so I needed to know the insides out. So fire you
 questions to the forum and you should get an answer from me or other
 learned persons.

 Wayne Trow
 PCB Design Technician
 Gallagher Group LTD
 Hamilton
 NEW ZEALAND
 [p] +64 7 838 9800 ext 8737
 [f] +64 7 838 9801
 [e] [EMAIL PROTECTED]




 SHAWN
 smulligan@extre   To: Protel EDA Forum
[EMAIL PROTECTED]
 meeng.com cc:
Subject: [PEDA] Camtastic
 24/01/02 04:53
 Please respond
 to Protel EDA
 Forum






 I haven't seen any posting here about CAMtastic. I'm using the program
 simply to panelize some boards for production. I would be interested in
 hearing opinions on the product or receiving advice on the process, from
an
 experienced user.

 Thanks, Shawn







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[PEDA] Plotting

2002-01-11 Thread Sean James

Is there a way to get Protel to plot to the center of a sheet? I'm using an
HP DesignJet 450C, and when I plot C size, the plot is offest. This makes
for a smaller plot than what the sheet size is (22 x 17). D size is fine.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Weird Problems with Protel -!!!

2002-01-11 Thread Sean James

Sounds like a WinDoze problem.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Brooks,Bill [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Friday, January 11, 2002 1:53 PM
Subject: [PEDA] Weird Problems with Protel -!!!


 I have had some unusual problems with Protel before but this one takes the
 cake. I open a schematic from our server directory, Protel 99SE sp6 tells
me
 that the schematic is an unknown file type
 First thing I thought... oh yea... must be a corrupt file... So I open
 Protel 98 and the file opens just fine hmmm
 Go back to 99SE SP6 and yup... it still doesn't open the file h
 Okay... check the setup of the program Lo and behold the Schematic
 Servers are not installed well they were Last night when I logged
off...
 Hmmm... Check licenses No license for schematic in the window...
what's
 up with that? You think it decided to drop them due to a conflict?
 We have about 8 licenses here...

 - Bill Brooks

 P.S. I called Altium(Protel) and tried to get a Tech Support person to
help
 me... all I got was a recording... and they will get to my message
 eventually...



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Re: [PEDA] Countersunk holes

2002-01-09 Thread Sean James

Can the holes be plated?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message - 
From: Watnoski, Michael [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Wednesday, January 09, 2002 9:09 AM
Subject: Re: [PEDA] Countersunk holes


 Hi Sean,
 
 All I ever had to do was call out the countersinks on the fab
 drawing.  The board house took care of the countersinks as a post
 fabrication operation.  Be sure to allow adequate clearances around the
 holes on all layers.
 
 Michael
 
 
 -Original Message-
 From: Sean James [mailto:[EMAIL PROTECTED]]
 Sent: Wednesday, January 09, 2002 8:15 AM
 To: Protel EDA Forum
 Subject: [PEDA] Countersunk holes
 
 
 This may be a long shot - Has anybody konw if it's possible to use c'sk
 holes on a PCB?
 Sean James
 PCB Designer
 Telecast Fiber Systems, Inc.
 102 Grove Street
 Worcester, MA 01605
 (TEL) 508.754.4858 x33
 (FAX) 413.541.6170
 
 

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[PEDA] Board Mirroring

2002-01-07 Thread Sean James

Does anybody know of a routine that would completely flip a board to help
with laying out bottom mount smt components? For all you old timers out
there, this is similar to flipping the whole artwork in order to tape the
solder side etch.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Protel 99 se SP4 on Windows XP Home

2002-01-07 Thread Sean James

Why is anybody bothering with a lousy piece of software like XP in the first
place?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: [EMAIL PROTECTED]
To: proteledaforum [EMAIL PROTECTED]
Sent: Saturday, January 05, 2002 5:46 AM
Subject: [PEDA] Protel 99 se SP4 on Windows XP Home


I attempted to find a faq for this forum but failed. I hope this question
has not been over-asked.
I have a new PC with WinXP home, when Protel 99 se is installed. XP help and
support fails to run. System info fails to run, sfc /scannow fails to run. A
comlete format and re-install is required to get these items operational
again and they fail immediately when Protel 99 se is installed. I know that
the Protel site shows Win 2000 compatibility and not XP but does anyone know
a workaround for the problems with XP?
Or has anyone else experienced the same problems but do not know a
workaround?

Regards

[EMAIL PROTECTED]
Posted from Association web site by: Derek Ellis




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Re: [PEDA] Ground Planes

2002-01-02 Thread Sean James

Be careful with planes. I made a pallet of 2 boards, and two of the planes
changed nets. If I didn't catch it reviewing the gerbers, BOOM! Instant
shorts.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Anthony Whitesell [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, December 28, 2001 3:57 PM
Subject: Re: [PEDA] Ground Planes



 Rene,

 There is a big difference between a plane and a polygon fill.  Planes
don't
 get repoured unlike polygons.  Planes are made as a negative gerber files
 which are much smaller.



 Steve,

 I noticed this and didn't give it much thought an just went around and
 deleted the extra connections.  But now that you mention it, I too have
seen
 this behavior when autorouting a PCB with planes.

 Anthony Whitesell
 Sunrise Labs


 -Original Message-
 From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]]
 Sent: Friday, December 28, 2001 3:49 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Ground Planes


 Since the plane takes a long time drawing/refreshing, I
 usually place the plane as last action.
 I finish the layout without plane, then save it and copy
 to a new name usually  'mydesign_WP.pcb', eg adding the _WP
 postfix. Then I pour the plane. If the fill is not complete,
 eg there are holes, a few vias assigned to GND do the job,
 - repour.

 For HF prints, a bunch of via's connect the upper and the
 lower GND plane. It takes some iteration until the plane
 and the vias make sense.

 Rene
 --
 Ing.Buero R.Tschaggelar - http://www.ibrtses.com

 Steve Pfeifenroth wrote:
 
  Hello everyone,
 
  In Protel everything is connected by a net. Fine. When you go to lay
 tracks
  on boards (If you let Protel do some of the work by auto routing)
connects
  like nets in a pin to pin fashion. I know I can configure some of the
  routings in the design rules section. But here is my question. Take for
  instance I create a ground plane that runs along the bottom whole length
 of
  a board. How can I get Protel to net off the ground plane using the
 shortest
  distance to a part? It seems to me that even if I create a ground plane
  (Calling it GND) and use the auto route it still connects from the pad
  instead of the plane. I can do it by hand but was hoping that I can have
  Protel do most of the work.



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[PEDA] Meetings

2001-12-21 Thread Sean James

Has anybody ever thought about having local meetings for Protel users?  This
way we can put a face to the people in the forum, and to exchange
information.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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[PEDA] Gerber file naming convention

2001-12-21 Thread Sean James

When Protel assigns gerber file name extensions (xx.gxx), what is the
rule for internal layers? I just did a 6 layer board, and the extensions
are. g10, .g1, .g2  .g5.
When you try to import either a single or batch file, Protel only allows a 3
character extension to be seen, and not a 2 character extension. Here are
the layer names and their filename extensions:
.G10 = -5V PLANE COPPER
.G5  = GROUND PLANE COPPER
.G1  = +3.3/+/-12V PLANE
.G2  = +5V PLANE





Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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[PEDA] Square vias

2001-12-18 Thread Sean James

I am setting up a chip  wire test PCB master, and I would like to use
square vias. The only way to make the existing vias square, is to select
them all and convert them to free pads. Or can I substitute free pads for
vias while routing?

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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[PEDA] Rotated pads

2001-12-18 Thread Sean James

Why don't rotated free pads photo plot?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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[PEDA] Menus add-ons

2001-12-18 Thread Sean James

I am willing to try available Protel add-ons, but I'm a neophyte when it
comes to customizing Protel. Does any body know of a quick and painless way
to create  modify menus (ala AutoCAD)?

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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[PEDA] Merging boards

2001-12-14 Thread Sean James




Re: [PEDA] Merging boards

2001-12-14 Thread Sean James

I like using split planes; using a poured internal plane is the same as an
external plane - every time you add or move holes, components, etc., you
have to repour the plane. Whereas a split plane doesn't have that problem;
as long as the via or pad is tied to the correct net, it stays connected, no
matter how much you move it. Also, I think a split plane makes for a smaller
file size  gerber plot.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Michael Reagan [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, December 14, 2001 1:33 PM
Subject: Re: [PEDA] Merging boards


 But other then that it works just fine. I most
  heartedly suggest
  that all design, checking and editing be absolutely complete before you
  merge boards because after merging editing or DRC checking and other
  operations can become very complex because of unrouted nets
  between boards,
  duplicate designators and the likes. Keep your original singular boards
to
  work on for future editing, keep the merged boards as a separate
panelized
  file, edit only the original singular boards when editing is required.
  The problem with merging boards which contain differing or split
  planes is very much more complex. Basically it probably shouldn't be
  attempted unless you are quite experienced or the boards are absolutely
  identical. For this very reason I usually use Mid-layers rather then
Plane
  layers and I draw my planes as polygons. This is much more conducive to
  merging multiple boards into a panel. It also gets you around some of
the
  limitations/bugs associated with Planes not being DRC'ed
  properly for all
  possible errors.
 

 Brad,
 I agree save your orig file after you run drcs, then  create a new file to
 panelize. So how difficult is it to toggle thru the plane layers, view
them
 and reconnect planes?  Not hard at all maybe two or three keystrokes.   I
 don't see it as a  problem.  Sure its not perfect but panelizing would be
 hard to implement to satisfy everyone's idea of how it should work
 especially when you expect drcs to work also.   The point is you can do it
 accurately, and it really isn't that much of a hassle. The other option is
 to use Camtastic, I never use pours on mid layers because most of the
board
 houses I have experience with, not only frown upon it, I had one refuse to
 fabricate the board because it compromised their lamination process.

 Mike Reagan
 EDSI




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Re: [PEDA] Keepouts DRC

2001-12-13 Thread Sean James

To add to Brad's note- I use keepouts to prevent polygon planes from pouring
in certain areas of my board.  I don't want poylgons under smt resistors,
etc. I want to be able to control where the polys go. the only way is with
keepouts on specific layers, and in certain areas. It's a nuisance to remove
the keepouts just to run a DRC. If you set a rule clearance to 0 for
keepouts, and then pour a poly, you get some very strange results. PCAD had
a nice way to create keepouts (that's not their exact name); the main fact
is that the keepouts didn't violate any DRC's! Does anybody remember the
exact name and use of keepouts in ACCEL/PCAD?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: Brad Velander [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Wednesday, December 12, 2001 5:36 PM
Subject: Re: [PEDA] Keepouts  DRC


 Rene  others,
 it is timely that Sean raised this issue because I have been
 fighting with related issues. In my case I have a very complex board
outline
 where I have copied the board outline to the bottom layer and made it a
 keepout and control my polygon outlines with respect to the board edge.
 There are associated issues but I get lots of violations that I am trying
to
 eliminate with rules, seems to only work part of the time. I also believe
 that I have found a bug relating to polygons while trying to accomplish
 this, I will write about it in a day or two when the crunch is off.
 In my case I have a number of drill holes at points along the board
 outline. These drills are to relieve the board outline edge where the
 overlying matrix has sharp corners that a router cannot achieve. Thus each
 of these drill holes have no net, no plating, no pad (0mils). Each and
 everyone of them causes a violation with the keepout.

 The funniest thing is working over several variations of the PCB
 design, some rules work in one copy of the board and while making the
 variations to the next version the same existing rule will quit working
all
 of a sudden. I have also had the keepout lines showing violations along
the
 entire board outline because they are touching the keepout adjacent to
them.
 The listed violation lists the one keepout track segment and it's adjacent
 connected track as the other violator in the pair. Go figure.

 There are also other cases where a violation is not avoidable, so I
 am trying to devise rules which will eliminate those violations. Sometimes
 the rules work, sometimes they do not. At the moment I have databases
which
 have over 300 violations which seem to be indefinable in the DRC rules
 set-up, most all are related to the keepout. I have even tried a rule
which
 states the keepout spacing to anything else (Board) is 0mils, no luck.

 Sincerely,
 Brad Velander.

 Lead PCB Designer
 Norsat International Inc.
 #300 - 4401 Still Creek Drive,
 Burnaby, B.C., Canada, V5C 6G9.
 Tel   (604) 292-9089 (direct line)
 Fax  (604) 292-9010
 Website: www.norsat.com


 -Original Message-
 From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]]
 Sent: Wednesday, December 12, 2001 8:06 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Keepouts  DRC


 You can draw a track manually over a keepout line.
 The DRC signals a violation and you ignore it.
 Is that what you want ?

 Rene
 --
 Ing.Buero R.Tschaggelar - http://www.ibrtses.com

 Sean James wrote:
 
  Is there any way to ignore or bypass keepouts during a DRC?
 



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Re: [PEDA] Add Colour to Nets

2001-12-13 Thread Sean James

This feature has helped me in seperating important nets from the Gordian
Knot of the remaining nets.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Thursday, December 13, 2001 1:47 AM
Subject: Re: [PEDA] Add Colour to Nets




 I did a search on 'color'(?) in all my emails and came up with this reply
from
 Brendon Slade..




  Hi Ian
 
  To change the colour of the ratsnest (ex PCAD user?) go to the Browse
 PCB
  tab in the Document Manager panel.  Click on the drop down list and
select
  Nets.  The panel immediately below should display the loaded nets.
 Select
  the net you wish to change the colour of and click on Edit
 (alternatively
  double click on the net to edit).  A dialogue box is displayed with
Colour
  being one of the options.  Select a colour.  I use this for power nets
and
  particular busses and other important nets.
 
  Regards
  Brendon.








 [EMAIL PROTECTED] on 12/13/2001 09:06:04 AM

 Please respond to Protel EDA Forum [EMAIL PROTECTED]

 To:   Protel EDA Forum [EMAIL PROTECTED]
 cc:(bcc: Clive Broome/sdc)

 Subject:  Re: [PEDA] How to change Netlist lines back to solid lines?



 Further to this thread, does anyone know how to set the default color of
the
 ratsnest lines. I know how to edit them but would prefer that they came up
 with the color of my choice everytime they were created.

 Regards,
 Lloyd

 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
 Sent: Wednesday, December 12, 2001 4:08 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] How to change Netlist lines back to solid lines?




 Sounds like the connections have been turned off. You can get them back
 again by
 doing the
 following in PCB:

 View - Connections - Show All


 This menu also has provision to hide or view individual components nets or
 global nets like power/ground.
 Its useful when placing parts to see a less cluttered ratsnest.



 ___

 Clive Broome
 IDT Sydney Design CentrePh: +61 2 9763 3513
 8 Bayswater Dr, HomebushFax:+61 2 9763 3409
 Sydney,  NSW, 2127  Email:[EMAIL PROTECTED]
 Australia

 ___










 Shuping Lew [EMAIL PROTECTED] on 12/13/2001 04:06:41 AM

 Please respond to Protel EDA Forum [EMAIL PROTECTED]

 To:   Protel EDA Forum [EMAIL PROTECTED]
 cc:(bcc: Clive Broome/sdc)

 Subject:  [PEDA] How to change Netlist lines back to solid lines?



 Hello, there, Does anybody know why my netlist on the PCB suddenly turned
 into hidden lines instead of solid lines? I did not change anything and
not
 sure how to changed them back to solid lines again. Thanks in advance.

 Susan Lew
 Quintron Systems, Inc
















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[PEDA] Keepouts DRC

2001-12-12 Thread Sean James




[PEDA] URGENT!!!

2001-12-12 Thread Sean James




Re: [PEDA] URGENT!!!

2001-12-12 Thread Sean James

Never mind. It was a stupid rule.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170

- Original Message - 
From: Brendon Slade [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, December 12, 2001 3:51 PM
Subject: Re: [PEDA] URGENT!!!


 Has it successfully poured before now?
 
 Is it just pouring outlines? - do you have No hatching selected?
 Do you have minimum primitive size set to something outrageous?
 
 Just some real quick thought.
 
 HTH
 Brendon.
 
 - Original Message - 
 From: Sean James [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Thursday, December 13, 2001 9:28 AM
 Subject: [PEDA] URGENT!!!
 
 
 What would keep a polygon pour from not forming if 
 A. There are no keepouts.
 B. There are no areas present to create dead copper pours.
 C. I am pouring over the same net.
 
 Sean James
 PCB Designer
 Telecast Fiber Systems, Inc.
 102 Grove Street
 Worcester, MA 01605
 (TEL) 508.754.4858 x33
 (FAX) 413.541.6170
 
 
 
 

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[PEDA] Virus warning

2001-12-10 Thread Sean James




Re: [PEDA] Blind and buried via's Mayhem

2001-12-07 Thread Sean James

But the tradeoff is the cost of laser drilling vs. normal drilling.
- Original Message -
From: Jon Elson [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, December 07, 2001 3:03 PM
Subject: Re: [PEDA] Blind and buried via's Mayhem


 Jeff Stout wrote:

  [snip]
 
   At 03:53 PM 11/29/2001 -0600, Jeff Stout wrote:
   1. Can I use a hole pair that goes through the prepreg, but
   does not go through the core material above or below that
   level?  I just don't see how it can be manufactured.
  
   No.  At least not to my knowledge.  My understanding of the process is
  that
   basically you can only use blind vias on cores.  You may not connect
cores
   to one another except with full through-hole vias.

 The exception to this is with vendors who use laser drills (similar to
 micro-via technology).  The power and duration of the laser pulse
 controls how deep the hole goes.  So, there, they can drill blind vias
 in a laminated board, but not buried, of course.  Those still have to
 be drilled in the cores before the lamination step.

 Jon



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[PEDA] Dialog boxes, etc. 2

2001-12-05 Thread Sean James




Re: [PEDA] Multiple Subcircuits

2001-11-27 Thread Sean James

I found it easy to do it in PCB. Just layout one cell, then cut  paste the
cell's tracks  vias to the next cell, the nets will rename themselves as
long as you have a good netlist. Of course, PCAD was easier to do this.

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Dave Babcock [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, November 27, 2001 6:53 AM
Subject: [PEDA] Multiple Subcircuits


 Hello!

 I have a PCB I am designing that I want to duplicate a subcircuit 64
times.
 I want to be able to layout the subcircuit once in PCB and then make an
 array of this subcircuit.
 Can I do this from the schematic or in the PCB?   Any help is appreciated

 Dave Babcock
 Cardinal Components
 Wayne, NJ


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[PEDA] Vias trace length

2001-11-27 Thread Sean James




[PEDA] Routines

2001-11-27 Thread Sean James




Re: [PEDA] Vias trace length

2001-11-27 Thread Sean James

My design is 2.5Ghz, so via length is critical.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Mike Reagan [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, November 27, 2001 12:39 PM
Subject: Re: [PEDA] Vias  trace length





 Is there any way to get Protel to add vias to an overall trace length? Ex.
A
 via going from top to bottom thru an .062 board would add .062 to a
total
 trace length (PCAD/ACCEL does this).

 Sean,
 I don't think .062 inch for any digital signal under 500 mhz makes any
 difference.  The actual capacitance of the via will pose more of a problem
 than the trace length.   Actual measurements made by Bill Brooks
 www.ultracad.com  and contributing editor to PCD magazine shows no
relevant
 impedance changes with vias placed in a trace.  There are little hic-cups
in
 the impedance but it really doesn't change much.   I wish protel would
give
 me a calculation of the capacitance with the via included.   A trace
length
 is irrelevant unless it approaches a critical length for the signal, but
 loss can become a  bigger factor.
 Question;   Why don't you use Acell PCAD?personally I think it sucks


 Mike Reagan
 EDSI
 Frederick MD


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[PEDA] Pin gate swapping

2001-11-21 Thread Sean James




[PEDA] Threads

2001-11-21 Thread Sean James




[PEDA] Footprint

2001-11-21 Thread Sean James




Re: [PEDA] Autorouter

2001-11-16 Thread Sean James

I've never have used autorouters. I'm from the old school, where I cut my
teeth with hand taping.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Tim Fifield [EMAIL PROTECTED]
To: Protel EDA Form [EMAIL PROTECTED]
Sent: Friday, November 16, 2001 9:07 AM
Subject: [PEDA] Autorouter


 Just curious... Does anybody use the 99SE autorouter for large PCB
designs?
 Do the majority of board designers do everything manually? I don't even
 bother with the autorouter anymore, it's to messy. Perhaps I'm not setting
 it up properly. What do you people do?

 Tim Fifield


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Re: [PEDA] Protel usage

2001-11-16 Thread Sean James

I only use the last 4 items on your list.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message - 
From: Edi Im Hof [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, November 16, 2001 1:17 PM
Subject: [PEDA] Protel usage


 
 Hi all
 
 Regarding the questions about 3D and autorouter, what parts of Protel do 
 you actually use?
 
 There are several tools lingering arround:
 
 - Schematic
 - PCB
 - Powerprint
 - CAM Manager
 - Simulator
 - Autorouter
 - 3D Viewer
 - PLD
 - Arrange Components
 - Autoplacer
 - PCB Miter
 - Signal Integrity
 - Database Link
 
 What else do we have?
 
 
 I actually use only:
 - Schematic
 - PCB
 - Powerprint
 - CAM Manager
 
 
 
 Edi Im Hof
 
 
 
 +  IH electronic+  Phone:   ++41 52 320 90 00  +
 +  Edi Im Hof   +  Fax: ++41 52 320 90 04  +
 +  Doernlerstrasse 1, Sulz  +  URL: http://www.ihe.ch  +
 +  CH-8544 Rickenbach-Attikon   +  E-Mail:  [EMAIL PROTECTED]   +
 +  Switzerland  +  +
 
 

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Re: [PEDA] Devil's Advocacy, ATS FAQs

2001-11-15 Thread Sean James

Say no more! It's as if Altium (and other big CAD software makers) are
penalizing the people who are utilizing their software. I wouldn't be
surprised if the future issues of Protel will have *cracks* available on the
Internet. I've run into the same situation, you have to upgrade your
software, but ALAS, the service contract has expired. Now you have to
justify to the people who don't even use the software, how much it'll cost
to A. Renew the license; B. Pay for the upgrade; C. (use your imagination).
My old boss would refuse to upgrade if HE didn't see the benefits. Maybe all
these EDA  CAD users should get together and develop their own software
than can be distributed for a nominal fee, and have it available on their
respective forums. (Does Linux ring a bell?)

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Fred A Rupinski [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Thursday, November 15, 2001 2:23 PM
Subject: [PEDA] Devil's Advocacy, ATS FAQs


I think it important that Protel users submit alternative viewpoints to
those presented in Altium's answers to ATS FAQs. Here is my contribution [my
comments]:

What is Altium Total Support (ATS)?
..ATS, which switches from an irregular-upgrade development model to a
continuous-evolution development model. [ATS is not needed for this. This is
an internal operational policy determined by Altium. Altium should always be
correcting irregularities as a matter of good practice.]..and the
ability for Altium to more easily train and maintain a stronger support
team.[Ditto]

What are the benefits of being an ATS member?
.. eliminate the inconvenience of lobbying for software upgrades. [How
else can Altium determine users' needs?]

Why did Altium introduce ATS for Protel users?
[The answer Altium introduced ATS because.. is not given.]

Why should I become an ATS member?
.. ATS membership minimizes the complication of budgeting for and
administering updates to your design tools..[Protel is one of over a
half dozen major tools I use, making this a trivial issue. My budget is an
important valid issue however, and $US1995 for membership cannot be
justified by anything I've learned so far.]

How do I become an ATS member?
[n/a for many 99SE users.]

I am a Protel 99 SE user, how does ATS affect me?
You will continue to receive full ATS-level technical support..[I would
therefore expect tech support to be scrambling to resolve a recent issue I
submitted, but such is not the case. No response yet. If this is ATS-level
support, then the future is bleak.]

I have purchased a Protel 99 SE Full Suite since October 1st 2001. When will
I receive confirmation of my ATS membership?
[n/a for many 99SE users.]

Can I buy ATS membership for my Protel 99 SE license purchased prior to
October 1st 2001?
(No)..you will continue to receive full ATS-level technical
support..[I would expect tech support to be scrambling to resolve a
recent issue I submitted, but such is not the case. No response yet. If this
is ATS-level support, then the future is bleak.]

When the next Protel version is released will I receive ATS as part of my
license?
Yes, ..as part of your purchase. [I can't reconcile this regarding users
who already have ATS support as described above. Aren't upgrades included at
no charge?]

What happens if I choose not to renew my membership?
..  If at a later date you wish to update your Protel design
tools..[Later might make sense judging by the current state of affairs.]

How much does ATS cost for Protel products?
[Extrapolating, I suspect that the real cost of ATS will be productivity
loss owing to additional burdens that membership places on users. ATS has
already drawn Protel users into a quagmire. This will be denied, But
Altium's statement the formation of closer and stronger relationships with
our customers - who in turn can help us improve the effectiveness of our
products means customers will be expected to expend resources hoping to rid
bugs and gain improvements. Sadly, only a fraction of user effort will bear
fruit. A huge waste of time.]

How much will it cost to upgrade to the next version of Protel if I am not
an ATS member?
[I can't reconcile this regarding users who already have ATS support under
existing 99SSE licenses as described above.]

I also received another long e-mail attempting to clarify the benefits of
ATS. This is an extraction from that e-mail:
..let me begin by saying that at this point you've received limited
information simply because there are limits in the amount of information
available at this time.  Please bare in mind that Altium Total Support (ATS)
is currently in its infancy - meaning we've yet to determine how exactly we
intend to implement things..
Are people really paying money for this?

To summarize, Altium already has a wealth of user input

Re: [PEDA] Exporting a schematic as a simple jpg, bmp, gif, etc.

2001-11-15 Thread Sean James

Try using Snagit from www.techsmith.com. It's great for capturing a portion
of your screen display, also you can edit the picture and print it.
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Watnoski, Michael [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Thursday, November 15, 2001 2:03 PM
Subject: Re: [PEDA] Exporting a schematic as a simple jpg, bmp, gif, etc.


 Hi Thomas,

 While Protel has some enhanced features for copying the screen
 image, my technique works for all windows software.  I just have not seen
a
 reason to modify my procedures just for Protel.

 Michael


 -Original Message-.com
 From: Thomas [mailto:[EMAIL PROTECTED]]
 Sent: Wednesday, November 14, 2001 6:30 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Exporting a schematic as a simple jpg, bmp, gif,
 etc.


 Michael there really is no need to do all that.
 Simply select the bits you want to copy in the schematic, use the
schematic
 copy function (don't forget to set a reference location) and only the
 selected bits are sent to the windows clipboard ready for pasting.

 If you don't want the title block and rest of the template to copy as
well,
 uncheck Tools/Preferences/Graphical Editing/Add template to clipboard.


  -Original Message-
  From: Watnoski, Michael [mailto:[EMAIL PROTECTED]]
  Sent: Thursday, 15 November 2001 8:25 AM
  To: 'Protel EDA Forum'
  Subject: Re: [PEDA] Exporting a schematic as a simple jpg, bmp, gif,
  etc.
  Importance: High
 
 
  Hi Ray,
 
  The method I use is to do a screen capture by pressing the print
  screen button after zooming in to show the area of interest
  as large as
  possible, and moving the cursor to the bottom of the screen.
  This saves an
  image of the current screen in the clipboard as a bitmap
  (.bmp) file.  Open
  a photo editor and ctrl V to paste the image.  Now I crop
  the edges to
  remove the toolbars and other extraneous details.  Another
  ctrl C to copy
  the edit image back to the clipboard.  Now open the word
  processor program
  and paste like any other image.  It may help to change your
  screen colors
  before starting this procedure unless you want light lines on a dark
  background.
  I hope this helps.
 
  Michael
 
  -Original Message-
  From: Ray Mitchell [mailto:[EMAIL PROTECTED]]
  Sent: Wednesday, November 14, 2001 3:39 PM
  To: Protel EDA Forum
  Subject: [PEDA] Exporting a schematic as a simple jpg, bmp, gif, etc.
 
 
  Hello,
 
  I would like to use Protel 99SE to draw some schematics with
  the intent of
  eventually using these schematics simply as drawings, as if I
  had drawn
  them with Visio, Corel, Micrographics, Paintshop, or some
  other generic
  drawing program.  I would then like to insert these drawings
  into Word,
  Wordpad, or whatever.  Does anyone have any insight into doing this?
 
  Thanks,
  Ray Mitchell
 
 
  This message was scanned for viruses on behalf of The Black 
  Decker Corporation.
 

 This message was scanned for viruses on behalf of The Black  Decker
 Corporation.


 This message was scanned for viruses on behalf of The Black  Decker
Corporation.

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Re: [PEDA] vias vs. pads

2001-11-13 Thread Sean James

Vias also don't have thermal reliefs like pads. (This works in PCAD,
though).
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Abd ul-Rahman Lomax [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Monday, November 12, 2001 11:09 PM
Subject: [PEDA] vias vs. pads


 The differences between vias and free pads are artificial.

 Vias in Protel 99SE are essentially free pads with the following
limitations:

 (1) Vias cannot have names
 (2) Vias cannot be any shape except circular.
 (3) Vias cannot exist on a single layer only. (I'm not sure about this, it
 is conceivable that one could configure a buried/blind via with one layer
 only. But my expectation would be that it would not work, or if it works
 it would set up many bugs, being thoroughly unconsidered and untested, I
 would think.

 Pads can do all of the above.

 on the other side, free pads are vias with the following limitations:
 (1) Free pads cannot be blind or buried, i.e., if they have a hole, it
goes
 all the way through the board.
 (2) If they are in a footprint (i.e., not free) their net assignments are
 affected by netlist load.

 Give us blind/buried layer attributes for pads and free pads will do
 everything that vias will do, plus they can be named, which means that it
 is easy to assign special rules to them.

 Vias, however, should be maintained for backward compatibility and the
 occasional via that one wants to be part of a footprint -- and/or a way
 should be introduced to cause a pad to behave under netlist load and DRC
 like a via. Perhaps a via checkbox.
 [EMAIL PROTECTED]
 Abdulrahman Lomax
 Easthampton, Massachusetts USA


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Re: [PEDA] HELP!

2001-11-13 Thread Sean James

OK, Abdul, I got the first part to work and created a *netlist* on the PCB.
Now how do I load that into the schematic and get the Ref Des to come out
correct and not erase the schematic.

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Abd ul-Rahman Lomax [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, November 13, 2001 12:38 PM
Subject: Re: [PEDA] HELP!


 At 09:21 AM 11/13/01 -0500, Sean James wrote:
 Ian, this is a good suggestion, however, the PCB hasn't any named nets.
He
 just wires point to point, and keeps track of the wiring in his head by
 using his rough schematic.

 I'll be more explicit.

 That is *not* a problem. Design/Netlist/Menu/Create Netlist from Connected
 Copper will give all the nets names. Then you reload that net list and run
 Design/Netlist/Menu/Update Free Primitives from Connected Pads, and your
 board will be just as if it had been designed with a net list.

 There is another command, Export Netlist from PCB, which would not work,
 this command merely exports the pad net assignments, not actual
connections.

 The command names may be different from what I have written, but you
should
 get the idea.


 [EMAIL PROTECTED]
 Abdulrahman Lomax
 Easthampton, Massachusetts USA


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[PEDA] HELP!

2001-11-12 Thread Sean James




[PEDA] Chip Wire

2001-11-09 Thread Sean James




[PEDA] Pricing

2001-11-09 Thread Sean James




Re: [PEDA] Chip Wire

2001-11-09 Thread Sean James

Any help or information would be greatly appreciated. My only other option
is to by a 3rd party add-on for AutoCAD (I used to do chip  wire in ACAD
without any intelligence; not easy and a big PITA).

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170
- Original Message -
From: Bob Fearon [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, November 09, 2001 11:59 AM
Subject: Re: [PEDA] Chip  Wire


 Sean
 I have used Protel for Chip and Wire, but it was Ver 2.8.
 If you can use that out date info, contact me off-forum.
 Bob Fearon


 Sean James wrote:

  Has anybody attempted to do chip  wire (hybrid layouts) with Protel?
 
  Sean James
  PCB Designer
  Telecast Fiber Systems, Inc.
  102 Grove Street
  Worcester, MA 01605
  (TEL) 508.754.4858 x33
  (FAX) 413.541.6170

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