Mamdouh,
after reading your question I believe that you may be under some
misconceptions.
It seems that you are talking about stitching vias around the
perimeter of the PCB only. If this is the case you will see very little
reduction of radiated emissions or susceptibility to EMI. This would be
because the shielding effect is only near the board edges and planar to all
the traces. Outgoing radiation or incoming EMI is after all a 3 dimensional
entity & stitched vias will only significantly reduce horizontally oriented
emissions from near traces (it has a minimal effect on vertical components
of the radiation, possibly enough to allow passing FCC/CE if you were quite
close to passing without them next to a noisy trace.).
I could write a multipage diatribe just to start guiding you down
proper path regarding radiation and EMI shielding. I would also probably
come under significant duress from others who have their own theories and
have been told many of the old wife's tales that I myself have heard many
times. There are some very good sources of information on this topic. Some
of these are any articles written by Douglas Brooks, Lee Ritchie for Printed
Circuit Design or the PCB Design Conference Proceedings. Also check out
Douglas Brooks website (http://www.ultracad.com/). There are also several
books, I cannot vouch for the suitability of these books but they should
supply significant insight for your queries.
Printed Circuit Board Design Techniques for EMC Compliance : A Handbook for
Designers (IEEE Press Series on Electronics Technology)
by Mark I. Montrose 2nd edition (June 2000)
IEEE; ISBN: 0780353765
Couldn't find the other book I was looking for, Abd ul-Rahman, what was the
title of your favorite book?
The one that has voodoo, black magic or something like that in the title.
Damn my memory is getting holey and it has nothing at all to do with
religion.
Brad Velander,
Lead PCB Designer,
Norsat International Inc.,
#300 - 4401 Still Creek Dr.,
Burnaby, B.C., V5C 6G9.
Tel. (604) 292-9089 direct
Fax (604) 292-9010
website www.norsat.com
> -----Original Message-----
> From: Mamdouh Wahab [mailto:[EMAIL PROTECTED]]
> Sent: Tuesday, July 10, 2001 1:58 PM
> To: Protel EDA Forum
> Subject: [PEDA] perimeter stitched ground vias question
>
>
> Greetings all,
>
> I am contemplating adding a stitched perimeter of grounded
> vias on my board outline to reduce generating noise and EMI.
> My board is an embedded microcontroller application
> that runs at 33 MHz .
>
> -Is this technique effective in reducing generated noise?
>
> -Is there an easy way to generate the about 1 mm distanced vias
> on a grounded fill or polygon?
>
> -Do I use a fill or a polygon for this?
>
> -My design is 6 layers, does it need to be around each signal layer?
>
>
> Thanks
>
> Mamdouh Wahab
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