[PEDA] changing electrical type

2002-04-18 Thread ttontis
Is there anyway I can change the electrical type of a pin to one that is not listed in the drop down menu? I would like to put an open drain on one of the pins. Thank you, Ted Tontis C.I.D. Engage Networks, Inc. 1320 N. Dr. Martin Luther King Jr. Drive River Level Milwaukee, WI 53212 PH

Re: [PEDA] PADS translation error

2002-04-22 Thread ttontis
The problem is that the translator can not import the files right. I tried to import PADS files a long time ago, and ran into the same problem. The only way I was able to import them was in PADS version 2.0 in ASCHII format. Even then I had layer registration problems, Traces on the wrong

Re: [PEDA] PADS translation error

2002-04-23 Thread ttontis
Mira, I think it is in the Protel translation, I have seen other CAD systems import the same with no problem. I have thought of trying to get some demo software from another vendor that I know can import into Protel w/o a hitch. I am not sure that you would be able to export a PCB with

[PEDA] Assembly arrays, and coupons

2002-05-16 Thread ttontis
I am currently working on a new design which I will be placing in an assembly array. I was wondering how many use protel to set up an assembly array? If you do set up assembly arrays do you specify coupons? or do you let your bare board manufacture and assembly house specify them? I ask this

Re: [PEDA] OT Too many hole sizes

2002-05-17 Thread ttontis
Brad, IPC is telling designers that documentation is something that is determined by the designer and the board house. Some designs are so complex they require full documentation others are simple enough that one could get away with limited documentation. If your design is going to be

Re: [PEDA] OT Too many hole sizes

2002-05-17 Thread ttontis
Brad, Here is the link to the IPC on-line book store http://webvision.ipc.org/scripts/mgrqispi.dll?APPNAME=IPCWEBPRGNAME=TOCFRAM EARGUMENTS=-N,-N,-A,-A,-N50 It should link you directly to IPC-D-325 Documentation Requirements for Printed Boards, Assemblies and Support Drawings. Regards,

Re: [PEDA] Too many hole sizes

2002-05-17 Thread ttontis
The only reason I brought up using inner layers, is because as we have just found out each design requires some special requirements. I have had tracks that where impedance controlled on inner layers, and buried passives. The only way to make sure that the board house knows what I want, I have to

Re: [PEDA] Assembly drawing reference designators

2002-05-31 Thread ttontis
Igor, I use the .Designator string in my PCB Lib., This insures that it is place on the board as soon as I place the component on the PCB. When I design the PCB part I add; assembly out line, .designator, silk screen out line, keep outs, and placement court yard. As soon as I update the

Re: [PEDA] Problem with Polygon Planes and Pads

2002-06-05 Thread ttontis
The fab house may have to add plating robber pads to keep your 5 mil clearance on the plane. If you have not contacted your fabhouse you my want to give them a call, you maybe able to avoid a charge for the extra plating time and set up charges. Regards, Ted snip Ouch! 5 mils clearance

Re: [PEDA] PCAD 2000 ASCII import export

2002-06-05 Thread ttontis
John, You can import them in if they are PCAD version 2 ASCII. You will have layer registration problems that you will have to clean up. Mechanical layers on silkscreen layers multlylayer pads that import as single layer, things like that. Regards, Ted -Original Message- From:

Re: [PEDA] ''Access violation'' problem

2002-06-13 Thread ttontis
Try confirming that the pcb.Lib is still available/selected for those components in your design. Regards, Ted -Original Message- From: EDA Software Technical Dpt. [mailto:[EMAIL PROTECTED]] Sent: Thursday, June 13, 2002 4:55 AM To: edaforum Subject: [PEDA] ''Access violation'' problem

Re: [PEDA] Global changes in schematic libraries.

2002-06-18 Thread ttontis
I have tried this as well. I contacted Altum and there reply was that you can not globally change them. This must be done one at a time. Regards, Ted -Original Message- From: Ian Rozowsky [mailto:[EMAIL PROTECTED]] Sent: Tuesday, June 18, 2002 11:30 AM To: Protel EDA Forum

Re: [PEDA] PCB breakoffs

2002-06-26 Thread ttontis
I would use a ribbon cable that was previously suggested, or use a flex circuit. Running traces to the edge of a board would cause lamination and corrosion problems. If the copper is run through the tab and then the board is snapped apart that copper track will be exposed on the edge.

Re: [PEDA] Protel clone on the way?!?!?!

2002-09-10 Thread ttontis
$195 for the full package? I think I might get it for home just to do some hobby boards. -Original Message- From: Stephen Casey [mailto:[EMAIL PROTECTED]] Sent: Tuesday, September 10, 2002 6:32 AM To: Protel forum Subject: [PEDA] Protel clone on the way?!?!?! Hello all, I haven't

Re: [PEDA] Protel clone on the way?!?!?!

2002-09-10 Thread ttontis
never thought of it that way. I should look at the agreement, after all we are using a floating lisc. -Original Message- From: Tony Karavidas [mailto:[EMAIL PROTECTED]] Sent: Tuesday, September 10, 2002 12:48 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] Protel clone on the way?!?!?!

Re: [PEDA] question about layer synchronization between PCB and f ootprint library

2002-10-09 Thread ttontis
Anandy, Have you checked that you turned on the midlayers in question? I ran into this problem when I started using extra layers in my libraries, and that was the solution. Regards, Ted -Original Message- From: Anand Kulkarni [mailto:[EMAIL PROTECTED]] Sent: Wednesday, October

Re: [PEDA] question about layer synchronization between PCB and f ootprint library

2002-10-09 Thread ttontis
Anand, sorry about miss spelling your name. Ted -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] Sent: Wednesday, October 09, 2002 3:33 PM To: Protel EDA Forum Subject: Re: [PEDA] question about layer synchronization between PCB and f ootprint library Anandy,

Re: [PEDA] PCB Layout Tricks to help identify Lemmon PCB's.

2002-12-16 Thread ttontis
use IPC 2221, and use the coupons. This will allow you to follow the build up of layers through plating and drilling. Any destructive testing can be done on these avoiding having to destroy a sample of the production board. Regards, Ted -Original Message- From: Brian Guralnick


2003-07-31 Thread ttontis
I am sure that this has been brought up many times, but could not locate anything in the archive. Has any one had the opportunity to try and design a board using micro via's or HDI style design methods with Protel99SE? How do the CAM files turn out? do I have to make a ton of crazy DRC rules?

[PEDA] Assembly drawings

2003-10-15 Thread ttontis
I have been given the task to add assembly drawings to a design that another engineer is working on using protel 99SE. I would like to go into the library that he is currently using and just add a mechanical layer 1 to each part with a .comment string, and update the PCB from the library. There

Re: [PEDA] Assembly drawings

2003-10-21 Thread ttontis
Mr. Lomax Thank you for the information it will work for this project. However I would like to have this done automatically, one less thing too worry about and one less thing for someone to forget. I would like to build a server to do what it is I need to have done, I have never tried

Re: [PEDA] Logo and non-English characters on PCB documents in DX P

2003-11-17 Thread ttontis
There was a Bitmap converter that you could download from the forum web sight. I still have a copy of it and could e-mail it too you. Regards, Ted -Original Message- From: Mike [mailto:[EMAIL PROTECTED] Sent: Monday, November 17, 2003 4:32 PM To: Protel EDA Forum Subject: Re: [PEDA]

Re: [PEDA] Strange Power Plane Connection

2004-01-14 Thread ttontis
I think what you are seeing is the crosshairs to the pad. What you are talking about looks like they intersect at the center of the pad, if this is not what you are talking about I am missing something else. I am sure once you view the gerbers you will not see the voids. Regards, Ted