Re: [PEDA] Process Identifiers

2001-09-04 Thread Brad Velander
Andrew, you're not suggesting that the poor individual try to use or navigate the Protel help system are you? Good luck. Brad Velander, Lead PCB Designer, Norsat International Inc., #300 - 4401 Still Creek Dr., Burnaby, B.C., V5C 6G9. Tel. (604) 292-9089 direct Fax (604) 292-9010 website

[PEDA] Stop updating power plane connections

2001-09-04 Thread Cam Andruik
Does anyone know how to force Protel99SE SP6 to stop updating power plane connections. I am deleting components off of a PCB to make a mechanical template and have cleared all nets and removed all layers except the Top and Bottom in Layer Stack Manager but still get the stupid updating power

[PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread CER67
Hello Group, I'm new to protel, trying to figure out how to create and implement IC sockets decals/footprints on a PCB layout. Is it as simple as placing an IC and its socket on top of each other -or will that create a design rule violation? In pads, we created a dummy part (without a

Re: [PEDA] Stop updating power plane connections

2001-09-04 Thread Brad Velander
Cam, haven't seen or experienced your problem because I have not tired to do what you are trying to do. But here is my stab at it. I believe that you would have to eliminate the plane layer or at least the plane layer netname. Then the updates should stop occuring. Try option 1 first. So:

Re: [PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread Brian Guralnick
You could try making, or editing a library component which has your custom socket decal. This component will be treated as 1 component. In the schematic, just change the IC's footprint to this new component decal. Brian Guralnick - Original Message - From: [EMAIL

Re: [PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread Darryl Newberry
Perhaps this is over simplistic, but... As long as the socket and component PCB footprints match, you can put the appropriate socket part number in a schematic symbol Part Field and include the field on the BOM report. You will also have to add a note on the BOM (or have an in-house convention)

Re: [PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread Brian Guralnick
SCRAP what I said earlier, need my morning coffee... :) Brian Guralnick - Original Message - From: Brian Guralnick [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, September 04, 2001 12:26 PM Subject: Re: [PEDA] Creating/implementing IC socket PCB

[PEDA] P-CAD - Protel Translation

2001-09-04 Thread websitevisitor
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[PEDA] desgronte@web.de

2001-09-04 Thread websitevisitor
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[PEDA] Orcad Net names off grid after translatation??

2001-09-04 Thread Phillip Stevens
I have an Orcad design I am importing into Protel 99SE SP6. When the design is imported, Net names are not being attached to the wires in Protel. If I pick up and slightly move the net name, it will then attach to the wire. Looking at the net name X,Y properties, I have discovered that the

Re: [PEDA] Orcad Net names off grid after translatation??

2001-09-04 Thread HxEngr

[PEDA] printing problem

2001-09-04 Thread Tommy Ã…kesson
Hello all All of a sudden the power print doesent show anything? It has worked quit perfekt earlier. All layer is selected, pressing Rebuild or Process PCB keep resulting in a blank paper. ( target pcb is selected ) Erase PPC file doesent help, getting same result. Any ideas?? Tommy * * * * *

Re: [PEDA] P-CAD - Protel Translation

2001-09-04 Thread Richard Bruer
Mike, As best I understand, the currently-available (unless they've updated in the last couple of months) translation pack from Protel only works with P-CAD 2000 files, and DOES NOT work with P-CAD 2001. I had exactly the trouble you are having until I got a demo version of P-CAD 2000. Richard

Re: [PEDA] P-CAD - Protel Translation

2001-09-04 Thread Fabian Hartery
I believe the latest service pack SP2 for PCAD corrects for the schematic ascii import but circuit imports do not work. In fact, the circuit board import in 2001 will corrupt the original design file. Richard is dead on the money that 2000 is ok. Fabe Fabian Hartery Research Engineer Guigne

Re: [PEDA] printing problem

2001-09-04 Thread Brad Velander
Tommy, here is my best guess at this moment. On the Browse PCB Print tab, click on the printer to highlight it, right click to bring up properties. Check the Print What area on the right mid way down the page. Is the Selected Objects Only checked? If it is checked, then the only

Re: [PEDA] Sv: Isolated Island on PCB

2001-09-04 Thread Jon Elson
Abd ul-Rahman Lomax wrote: At 02:04 PM 9/1/01 -0400, Mike Reagan wrote: I doubt if you will find a decent board house that is willing to fabricate poygon pours on internal layers.notice I said decent Talk to some manufacturing engineers to find out why this is frowned upon I

[PEDA] BOM

2001-09-04 Thread Nicholas Cobb
I was wondering if there is any way to make changes in the .xls spreadsheet BOM and have the part fields updated on the schematic. Nick Cobb * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: *

[PEDA] None

2001-09-04 Thread Evan Scarborough
Greetings all, Is there a way to set up a design rule so that the defined keepout areas only affect the outer layers (other than ignoring or turning off online DRC)? I am routing an 8 layer pcb and the surfaces have rather complicated keepout areas for a metal frame that mounts flush, but

Re: [PEDA] 2 P99 quirks

2001-09-04 Thread Evan Scarborough
Greetings Jon, I have the missing dot syndrome also with the default font , but when I use the san serif font I get dots again. Another thing that may be happening if the text is small is that the plotter sees dots as a zero length draw and some board houses have their plotters or front end

Re: [PEDA] None

2001-09-04 Thread Richard Bruer
Rather than putting down a regular keepout, put down a couple of layer-specific keepouts (on the outer layers). Richard Bruer, P.E. Chief Engineer Instrument Division American Magnetics, Inc. 112 Flint Road Oak Ridge, TN 37830 Phone: (865) 482-1056 Fax: (865) 482-5472 mailto:[EMAIL PROTECTED]

Re: [PEDA] None

2001-09-04 Thread Brad Velander
Evan, first I must assume that you are using P99SE. In P99SE there are layer specific keepouts. Under Place at the bottom of the pop down menu you will find a place utility for placing keepouts. As well you can draw ordinary line boundaries, select them all and then globally change all

Re: [PEDA] Process Identifiers

2001-09-04 Thread rlamoreaux
Nah... just sharing my own experience. Once upon a time, shortly after I started moving from my old DOS app to P98, I accidently modified the File menu heading by double-clicking on the menu, before I knew (as in RTFM!) that one could modify the menu. Must have tried to exit the menu-edit

Re: [PEDA] None

2001-09-04 Thread Dennis Saputelli
use the layer specific keepout tracks they work they look like tracks at first until you look at them closely they don't plot with the real tracks Dennis Saputelli Evan Scarborough wrote: Greetings all, Is there a way to set up a design rule so that the defined keepout areas only affect

Re: [PEDA] Process Identifiers

2001-09-04 Thread Brad Velander
Rob, you must have got lucky, go buy a lottery ticket, quick! I still get the stupid edit menu box popping up all the time with Sp6. Brad Velander, Lead PCB Designer, Norsat International Inc., #300 - 4401 Still Creek Dr., Burnaby, B.C., V5C 6G9. Tel. (604) 292-9089 direct Fax (604)

Re: [PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread Dwight
What I did was simply have a Schematic Lib component for the socket with no pins, and a corresponding PCB Lib component (footprint) that had the silkscreen I wanted (but no pads, of course). The socket component is placed on the schematic, so it shows up in the BOM; when you synchronize, the

Re: [PEDA] Process Identifiers

2001-09-04 Thread Brian Guralnick
Me too. Brian Guralnick - Original Message - From: Brad Velander [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Tuesday, September 04, 2001 4:49 PM Subject: Re: [PEDA] Process Identifiers | Rob, | you must have got lucky, go buy a lottery ticket, quick!

Re: [PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread Abd ul-Rahman Lomax
At 12:14 PM 9/4/01 -0400, [EMAIL PROTECTED] wrote: I'm new to protel, trying to figure out how to create and implement IC sockets decals/footprints on a PCB layout. Is it as simple as placing an IC and its socket on top of each other -or will that create a design rule violation? It may create

Re: [PEDA] Process Identifiers

2001-09-04 Thread Dennis Saputelli
is that nominally a right click type of thing? if so and it is popping up on a left click then you can clear it by holding the right shift key down and right clicking somewhere in space or maybe it's a left click, it hasn't happened lately Dennis Saputelli Brad Velander wrote: Rob,

Re: [PEDA] None

2001-09-04 Thread Jon Elson
Evan Scarborough wrote: Greetings all, Is there a way to set up a design rule so that the defined keepout areas only affect the outer layers (other than ignoring or turning off online DRC)? I am routing an 8 layer pcb and the surfaces have rather complicated keepout areas for a metal

Re: [PEDA] 2 P99 quirks

2001-09-04 Thread Jon Elson
Evan Scarborough wrote: Greetings Jon, I have the missing dot syndrome also with the default font , but when I use the san serif font I get dots again. Ah, thanks. That is a useful workaround, as it might take Altium a while to get this fixed and in the next SP release. Another thing

Re: [PEDA] Process Identifiers

2001-09-04 Thread Andrew J Jenkins

Re: [PEDA] Process Identifiers

2001-09-04 Thread Andrew J Jenkins

Re: [PEDA] 2 P99 quirks

2001-09-04 Thread Brad Velander
Jon, your DXF problem is not so strange at all. Because of the complexities of differing DXF versions and different tools generating the DXFs, reading them into Protel can be real hit and miss. For example, I have one DXF that reads perfectly into P98. Reading the same file into P99SE a

Re: [PEDA] BOM

2001-09-04 Thread John Haddy
I haven't had much joy in using the internal spreadsheet: it's far too limited and is restricted to the current session only. Instead, I export all part fields to a .dbf file, which I then open with Excel and edit. Finally, I reimport the database. Check out the processes

Re: [PEDA] the letter i in gerber, was 2 P99 quirks

2001-09-04 Thread Abd ul-Rahman Lomax
Indeed, with the default font, the dot on the i is missing in gerber. It also disappears in draft display mode. I looked directly at the gerber file; there is no attempt to draw the dot. It is not a case of a zero-length draw. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA

Re: [PEDA] 3d Solids Modelling pkg

2001-09-04 Thread Peter Bennett
Don Ingram wrote: Hi All, We are looking for a 3D cad pkg for generating components enclosures etc for product design. $7K is a bit steep for us for Autocad or Solidworks given the frequency of use. ( at least for now ) Does anyone have any suggestions on a useful package that lives

Re: [PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread Ian Wilson
On 04:26 PM 4/09/2001 -0700, Abd ul-Rahman Lomax said: ..snip.. Don't you hate it when you ask How do I ... and someone answers You shouldn't! You are trying to control the BOM from the PCB, but the BOM report from PCB is primitive compared to what can be done from the schematic. The BOM -- or

Re: [PEDA] Gerber clearance violations not found by Protel DRC

2001-09-04 Thread Abd ul-Rahman Lomax
At 05:14 PM 9/4/01 -0500, Jon Elson wrote: Don't use measure primitives, use Report Measure Distance. You may have to set the snap grid to a small value, like .01 mil while you are doing the measuring. Reports/Measure Distance is not particularly good at accurately measuring the distance

Re: [PEDA] 3d Solids Modelling pkg

2001-09-04 Thread Dennis Saputelli
acad is $3K SW is $4K at least here in usa i'm afraid that may be as far down the price scale as you can (or maybe should) go acad is pretty long in the tooth IMHO, all things 3D were glommed onto the core sw looks very cool and is inherently 3D and is much more touchy feeley, but either will

Re: [PEDA] 3d Solids Modelling pkg

2001-09-04 Thread Don Ingram
Thanks for the help guys, I'll have a look at Intellicad. I had a peep at this back in the Visio days. That was AUD$7K. A fair few shekels for a small business. Cheers Don Ingram [EMAIL PROTECTED] Ph +61 7 4954 6074UTC+10hrs Fx +61 7 4954 6222 - Original Message - From: Peter

Re: [PEDA] gerber gen troubles

2001-09-04 Thread Dennis Saputelli
anyone noticed: when you hit F9 to make gerbers it makes ones that you have previsouly selected but have currently deselected very aggravating and a potential source of trouble scenario 1 (i dbl checked this) made a simple bd, plotted and reviewed in camtastic made some changes and decided not

Re: [PEDA] gerber gen troubles

2001-09-04 Thread Brad Velander
Dennis, I think that something is hooped in your Protel. I do the sort of thing that you are talking about but have not seen the issue you have. Oh, hold it,stop the presses. Dennis, I believe that you may find that it is not regenerating the all the Gerbers. Could it just be

Re: [PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread Dwight Harm
Ian, I can see your points; but here's why I take the other approach of having the IC w/pins pads, and the socket having just an overlay: - Sometimes we only have the socket for prototype, then remove it; our method makes it a simple change to remove the socket. - We can have a single library