[PEDA] Clearance from edge of board

2001-10-31 Thread Wayne Trow

Hi All

Im sure this one has been touched before.

I need to create two strips on either end of a board that are completely
void of components. Its ok to place traces in these areas but not
components.

How do I set up a design rule to check for violations?

I could draw keep outs but that would keep out traces as well - which is
what I dont want.

Thanks in Advance

Wayne Trow
Gallagher Group LTD
Hamilton
New Zealand

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Re: [PEDA] Clearance from edge of board

2001-10-31 Thread Thomas

Create a Room Definition (design rules/placement).

 -Original Message-
 From: Wayne Trow [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, 1 November 2001 11:55 AM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Clearance from edge of board
 
 
 Hi All
 
 Im sure this one has been touched before.
 
 I need to create two strips on either end of a board that are 
 completely
 void of components. Its ok to place traces in these areas but not
 components.
 
 How do I set up a design rule to check for violations?
 
 I could draw keep outs but that would keep out traces as well 
 - which is
 what I dont want.
 
 Thanks in Advance
 
 Wayne Trow
 Gallagher Group LTD
 Hamilton
 New Zealand
 

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Re: [PEDA] Clearance from edge of board

2001-10-31 Thread Wayne Trow


Thomas (and All)

I have already placed them (manually) and I am going to move them so they
are 1cm away from the end edges of the board. I would like to set up a
design rule to check that I have actually placed them 1cm away from the
edge.

Cheers

Wayne


   
  
Thomas   
  
[EMAIL PROTECTED]   To: 'Protel EDA Forum' 
[EMAIL PROTECTED]   
m.aucc:   
  
 Subject: Re: [PEDA] Clearance from edge 
of board
01/11/01 14:08 
  
Please respond 
  
to Protel EDA 
  
Forum 
  
   
  
   
  




Create a Room Definition (design rules/placement).

 -Original Message-
 From: Wayne Trow [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, 1 November 2001 11:55 AM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Clearance from edge of board


 Hi All

 Im sure this one has been touched before.

 I need to create two strips on either end of a board that are
 completely
 void of components. Its ok to place traces in these areas but not
 components.

 How do I set up a design rule to check for violations?

 I could draw keep outs but that would keep out traces as well
 - which is
 what I dont want.

 Thanks in Advance

 Wayne Trow
 Gallagher Group LTD
 Hamilton
 New Zealand






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Re: [PEDA] Clearance from edge of board

2001-10-31 Thread Peter Lang

Hi Wayne,

Go to Rules Design Rules  Placement
Room Definition, then create an All_Comp_Class
and then define your XY co-ord's for the area you want to keep
you comp's restricted too.

Hope this helps...

Peter


-Original Message-
From: Wayne Trow [mailto:[EMAIL PROTECTED]]
Sent: Thursday, 1 November 2001 11:55 AM
To: [EMAIL PROTECTED]
Subject: [PEDA] Clearance from edge of board


Hi All

Im sure this one has been touched before.

I need to create two strips on either end of a board that are completely
void of components. Its ok to place traces in these areas but not
components.

How do I set up a design rule to check for violations?

I could draw keep outs but that would keep out traces as well - which is
what I dont want.

Thanks in Advance

Wayne Trow
Gallagher Group LTD
Hamilton
New Zealand

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Re: [PEDA] Clearance from edge of board

2001-10-31 Thread Thomas

Ok, create a new Room Definition (double click on
Design/Rules/Placement/Room Definition) as follows:

Filter Kind: Component Class
Component Class: All Components
(calculate the co-ordinates for 1cm inside your PCB boundary for the
following)
x1:
x2:
y1:
y2:


i.e. for a 100mm x 100mm PCB with bottom left corner at the origin:

x1:10
x2:90
y1:10
y2:90

Select which layer you want (are your component on the top or bottom layer,
if both then two Room Definition rules will be required).

Select keep objects inside

Run the DRC (Tools/Design Rule Check) with the Room Definition check box
ticked.

Any components outside the room will cause a violation.

Hope this helps,

Tom.


 -Original Message-
 From: Wayne Trow [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, 1 November 2001 12:19 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Clearance from edge of board
 
 
 
 Thomas (and All)
 
 I have already placed them (manually) and I am going to move 
 them so they
 are 1cm away from the end edges of the board. I would like to set up a
 design rule to check that I have actually placed them 1cm 
 away from the
 edge.
 
 Cheers
 
 Wayne
 
 
   

 Thomas  

 [EMAIL PROTECTED]   To: 'Protel EDA 
 Forum' [EMAIL PROTECTED]   
 m.aucc:  

  Subject: Re: 
 [PEDA] Clearance from edge of board   
  
 01/11/01 14:08

 Please respond

 to Protel EDA

 Forum

   

   

 
 
 
 
 Create a Room Definition (design rules/placement).
 
  -Original Message-
  From: Wayne Trow [mailto:[EMAIL PROTECTED]]
  Sent: Thursday, 1 November 2001 11:55 AM
  To: [EMAIL PROTECTED]
  Subject: [PEDA] Clearance from edge of board
 
 
  Hi All
 
  Im sure this one has been touched before.
 
  I need to create two strips on either end of a board that are
  completely
  void of components. Its ok to place traces in these areas but not
  components.
 
  How do I set up a design rule to check for violations?
 
  I could draw keep outs but that would keep out traces as well
  - which is
  what I dont want.
 
  Thanks in Advance
 
  Wayne Trow
  Gallagher Group LTD
  Hamilton
  New Zealand
 
 
 
 
 
 

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Re: [PEDA] Clearance from edge of board

2001-10-31 Thread Brendon Slade

...and change the room definition properties keep components out - via
right mouse click on room in question, or through design rules  placement 
room definition.


- Original Message -
From: Thomas [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Thursday, November 01, 2001 2:08 PM
Subject: Re: [PEDA] Clearance from edge of board


 Create a Room Definition (design rules/placement).

  -Original Message-
  From: Wayne Trow [mailto:[EMAIL PROTECTED]]
  Sent: Thursday, 1 November 2001 11:55 AM
  To: [EMAIL PROTECTED]
  Subject: [PEDA] Clearance from edge of board
 
 
  Hi All
 
  Im sure this one has been touched before.
 
  I need to create two strips on either end of a board that are
  completely
  void of components. Its ok to place traces in these areas but not
  components.
 
  How do I set up a design rule to check for violations?
 
  I could draw keep outs but that would keep out traces as well
  - which is
  what I dont want.
 
  Thanks in Advance
 
  Wayne Trow
  Gallagher Group LTD
  Hamilton
  New Zealand
 



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Re: [PEDA] Clearance from edge of board

2001-10-31 Thread Wayne Trow


Thanks

That sounds like a winner - I will try it later.

Wayne


   
  
Thomas   
  
[EMAIL PROTECTED]   To: 'Protel EDA Forum' 
[EMAIL PROTECTED]   
m.aucc:   
  
 Subject: Re: [PEDA] Clearance from edge 
of board
01/11/01 14:44 
  
Please respond 
  
to Protel EDA 
  
Forum 
  
   
  
   
  




Ok, create a new Room Definition (double click on
Design/Rules/Placement/Room Definition) as follows:

Filter Kind: Component Class
Component Class: All Components
(calculate the co-ordinates for 1cm inside your PCB boundary for the
following)
x1:
x2:
y1:
y2:


i.e. for a 100mm x 100mm PCB with bottom left corner at the origin:

x1:10
x2:90
y1:10
y2:90

Select which layer you want (are your component on the top or bottom layer,
if both then two Room Definition rules will be required).

Select keep objects inside

Run the DRC (Tools/Design Rule Check) with the Room Definition check box
ticked.

Any components outside the room will cause a violation.

Hope this helps,

Tom.


 -Original Message-
 From: Wayne Trow [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, 1 November 2001 12:19 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Clearance from edge of board



 Thomas (and All)

 I have already placed them (manually) and I am going to move
 them so they
 are 1cm away from the end edges of the board. I would like to set up a
 design rule to check that I have actually placed them 1cm
 away from the
 edge.

 Cheers

 Wayne




 Thomas

 [EMAIL PROTECTED]   To: 'Protel EDA
 Forum' [EMAIL PROTECTED]
 m.aucc:

  Subject: Re:
 [PEDA] Clearance from edge of board

 01/11/01 14:08

 Please respond

 to Protel EDA

 Forum









 Create a Room Definition (design rules/placement).

  -Original Message-
  From: Wayne Trow [mailto:[EMAIL PROTECTED]]
  Sent: Thursday, 1 November 2001 11:55 AM
  To: [EMAIL PROTECTED]
  Subject: [PEDA] Clearance from edge of board
 
 
  Hi All
 
  Im sure this one has been touched before.
 
  I need to create two strips on either end of a board that are
  completely
  void of components. Its ok to place traces in these areas but not
  components.
 
  How do I set up a design rule to check for violations?
 
  I could draw keep outs but that would keep out traces as well
  - which is
  what I dont want.
 
  Thanks in Advance
 
  Wayne Trow
  Gallagher Group LTD
  Hamilton
  New Zealand
 










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