[PEDA] Internal plane problems

2002-12-10 Thread Afshin Salehi
Sirs,
I have noticed a problem when I route a multilayer board with an internal
power plane split up into different sections in 99SE.  When I setup an
internal plane then add split planes to it the auto router doesn't seem to
check if the via it placed into the board is actually going into the plane.
It seems like if the via is in the pcb the router considers its job done and
I have to find out when I run the DRC that it didn't connect to the plane it
was supposed to.  It feels like one of those problems where I am missing
something simple.  What would that simple thing be?  :)

Afshin Salehi
DPS Telecom

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Re: [PEDA] Internal plane problems

2002-12-10 Thread Brian Sherer
Afshin,

Addition of the secondary planes has to be done in a certain way,
or Protel has trouble allocating the plane areas. To add secondary
Split Planes, it's necesary to create holes on the Primary Plane
by editing its vertices (ie, by doing Edit Move Polygon Vertices, 
selecting the polygon, then dragging the handle {a small cross in the 
middle of a side of the plane polygon} to a new location). Continue
until sufficient space is created for the new Split Plane, and add the new
plane. Though the edges of the Split Planes can coincide, be sure not to 
overlap copper areas of the various planes. 

Also note that the Primary Plane must not be closed, or completely
enclosing any Secondary Plane. You must break the margin of the
Primary Plane toward the edge of the board to create a gap in the
Primary Plane for each Secondary Plane. Protel's Help system has an
example, I believe. Check Plane current density and signal layer paths to 
determine the best place to create these gaps.

These are supposed to be hard and fast rules, but I've had boards that
checked and ran OK even with small embedded Split Planes. But the
procedure should be followed, since DRC results and plane connection 
assignment is unpredictable if it's not.

I'm sure others have more tips.

Brian

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Re: [PEDA] Internal plane problems

2002-12-10 Thread Sanders, Dave
The instruction below is not correct.
A primary or outer plane CAN completely enclose any number of secondary planes, 
it is secondary planes that must not enclose any other secondary planes. The 
example diagram in the manual is a little misleading in that it doesn't specifically
show the outermost plane. Read the caption carefully. (P.571 in 99 manual)

Dave Sanders

-Original Message-
From: Brian Sherer [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, December 11, 2002 6:28 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Internal plane problems

snip
Also note that the Primary Plane must not be closed, or completely
enclosing any Secondary Plane. You must break the margin of the
Primary Plane toward the edge of the board to create a gap in the
Primary Plane for each Secondary Plane. Protel's Help system has an
example, I believe. Check Plane current density and signal layer paths to 
determine the best place to create these gaps.
snip
Brian

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Re: [PEDA] Internal plane problems

2002-12-10 Thread Brian Sherer
Thanks, Dave...

Brian

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