Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-09 Thread Robert M. Wolfe

Ian  Brad,
Ya got my vote on this one 100%. Both well said.
Bob Wolfe
- Original Message -
From: Ian Wilson [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, October 09, 2002 12:33 AM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 On 08:26 PM 8/10/2002 -0700, JaMi Smith said:
  
   I refer you to their capability page:
   http://www.lintek.com.au/boa.htm
  
   Note the text (Tolerance on track widths is +- 0.008mm or better
   depending
   on the design and uniformity of copper distribution.)
  
 
 Please note that they state uniformity of copper distribution, which in
 most instances means the uniformity of copper thickness across the
surface
 of the board, which is at least as big a problem as the one that we are
 discussing.

 Rubbish - it means they can ensure better fine line quality and control
 when there is an even density of copper over the board.  Nothing to do
with
 thickness.  I know these people well.  They do not make idle and confusing
 statements.  In the PCB manufacturing industry everyone knows what is
meant
 by density and distribution.  You seem to be having some issues here with
 this, as well as having a tendency to wish be Last-Word-JaMi.

 Over an out on this from me.  We should all have taken it to the OT list
 ages ago.  Getting silly now.

 Ian




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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread ajenkins

Interesting, I thought that the copper balancing act was only for
containing possible warpage. Makes sense, though. Thanks for tip.

aj

 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] 
...
 I did this type of pour and had the board house 
 slap my wrists ...The explanation was that if 
 you have a big pour with lots of copper on one 
 side you need about the same copper on the other
 side to balance it. Otherwise the acid on one side 
 gets weak while the other side remains strong, 
 resulting in overetching on one side or 
 under-etching on the other

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Brad Velander

Aj or others,
same issue with plating. Differences in copper density (over area)
effect the plating rate of Cu to the circuit pattern. Balanced copper side
to side, area to area, is the fabricators best friend (yours also in the
end).

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com
Norsat's Microwave Products Division has now achieved ISO 9001:2000
certification 



 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
 Sent: Tuesday, October 08, 2002 9:51 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
 Interesting, I thought that the copper balancing act was only for
 containing possible warpage. Makes sense, though. Thanks for tip.
 
 aj
 
  From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] 
 ...
  I did this type of pour and had the board house 
  slap my wrists ...The explanation was that if 
  you have a big pour with lots of copper on one 
  side you need about the same copper on the other
  side to balance it. Otherwise the acid on one side 
  gets weak while the other side remains strong, 
  resulting in overetching on one side or 
  under-etching on the other

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread JaMi Smith

Rob,

As AJ points out, part of what they say is correct, and you do need to
balance the layers, and the primary reason is to prevent warpage and
related problems.

However, the remaining issue, is raising a flag about your boardhouse.

Most boardhouses today use equipment that continually sprays the etchant
on the surface of the board, and hence also washes away the etched copper.

Some boardhouses may still dip or submerge the board into an etchant
tank, where the board simply sits in the etchant, however, there should be
enough agitation or circulation of the etchant to prevent what they are
describing from happening.

What they are telling you is that they simply dip your board into an
etchant tank and leave it there, with no agitation or circulation,
which, yes, will cause the symptoms they describe.

But they are also telling you that they are not making your boards properly
and that you should be looking for another boardhouse.

JaMi

- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 9:50 AM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 Interesting, I thought that the copper balancing act was only for
 containing possible warpage. Makes sense, though. Thanks for tip.

 aj

  From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
 ...
  I did this type of pour and had the board house
  slap my wrists ...The explanation was that if
  you have a big pour with lots of copper on one
  side you need about the same copper on the other
  side to balance it. Otherwise the acid on one side
  gets weak while the other side remains strong,
  resulting in overetching on one side or
  under-etching on the other

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Brad Velander

Jami,
that's just blatantly not true! There is nothing questionable about
a board house that directs you to issues of uneven etching or plating
because of varying Cu distribution. Not even with spray etchers.

Spray etchers are generally better than tanks but they are not
perfect either when it comes to unbalanced copper. Some of the best fab
houses using spray etchers will still point out unbalanced etching because
of unbalanced copper, even though they 'can' adjust the spray rates and
pressures to compensate at least side/side or one general area to another.
However, they cannot compensate for variances in a different areas over the
same side. It is all a time issue, how long is the area of copper in the
etchant, spray or otherwise, verses how much copper there is to etch off.
The more copper to remove, the more time required. Less copper to remove,
less time. Thus with unbalanced copper the shop has to define some median
time to adequately remove all the copper to be etched without removing or
undercutting other areas too badly. Remember that these spray etchers are
conveyorized, they can't sense areas of a board and speed up or slow down
the conveyor. Let alone sense what is on the other side of the panel, what
is on the other board within the panel but 16 inches away under the other
etchant nozzles. Or how about the etch nozzles that swivel/sway back and
forth, how would you vary them for differing areas of the board when they
are sweeping large areas of a panel that is also moving. It is all a game of
averages, you average your Cu distribution, they average their etching, you
receive a good well-etched board.

We tightly control our etching tolerances and undercut on almost all
of our boards. So we go through this all  the time with big high tech
fabricators and smaller low tech fabricators as well. Some of the biggest
etching F-ups and the whining afterward, have come from big high tech shops
with very good reputations and the best etching equipment around. I have had
fabricators hedge their bets against being able to control their etching to
our requirements, until they can see our boards/panels. They are looking for
the even distribution of the Cu in order to meet the tight etching
tolerances.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com
Norsat's Microwave Products Division has now achieved ISO 9001:2000
certification 



 -Original Message-
 From: JaMi Smith [mailto:[EMAIL PROTECTED]]
 Sent: Tuesday, October 08, 2002 11:18 AM
 To: Protel EDA Forum
 Cc: JaMi Smith
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
 Rob,
 
 As AJ points out, part of what they say is correct, and you do need to
 balance the layers, and the primary reason is to prevent 
 warpage and
 related problems.
 
 However, the remaining issue, is raising a flag about your 
 boardhouse.
 
 Most boardhouses today use equipment that continually 
 sprays the etchant
 on the surface of the board, and hence also washes away the 
 etched copper.
 
 Some boardhouses may still dip or submerge the board into 
 an etchant
 tank, where the board simply sits in the etchant, however, 
 there should be
 enough agitation or circulation of the etchant to prevent 
 what they are
 describing from happening.
 
 What they are telling you is that they simply dip your board into an
 etchant tank and leave it there, with no agitation or circulation,
 which, yes, will cause the symptoms they describe.
 
 But they are also telling you that they are not making your 
 boards properly
 and that you should be looking for another boardhouse.
 
 JaMi
 

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Terry Harris

On Tue, 8 Oct 2002 11:18:07 -0700, you wrote:

Some boardhouses may still dip or submerge the board into an etchant
tank, where the board simply sits in the etchant, however, there should be
enough agitation or circulation of the etchant to prevent what they are
describing from happening.

Nothing you can do will eliminate the problem, just hope to reduce the
effects. A lot of copper in one area of the PCB will take longer to etch
resulting in over etching (undercutting) in areas with less copper. The
board house can't afford to over etch because some tracks will undercut
unacceptably (or even completely and fall off the board), under etching
risks leaving shorts in the dense areas. You are giving them process
control and yield problems seems reasonable they want you to pay extra. 

Before the etching problem there is a similar problem with plating. Need
100A for the copper on one side of the board and 5A for the other - how do
you arrange that? I think the only thing they can do is fiddle around with
anode spacing on each side of the board to try to balance it a bit. They
can't plate at 100A anyway because it puts too much current through the
sparse areas and leaves the tracks with an uneven 'frazzled' appearance. 

Again you are giving them process control and yield problems and slowing
them down. 


Cheers, Terry.

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread JaMi Smith

Brad see below . . .

- Original Message -
From: Brad Velander [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 12:25 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 Jami,
 that's just blatantly not true! There is nothing questionable about
 a board house that directs you to issues of uneven etching or plating
 because of varying Cu distribution. Not even with spray etchers.

 Spray etchers are generally better than tanks but they are not
 perfect either when it comes to unbalanced copper. Some of the best fab
 houses using spray etchers will still point out unbalanced etching because
 of unbalanced copper, even though they 'can' adjust the spray rates and
 pressures to compensate at least side/side or one general area to another.

what are you saying and meaning when you speak of unbalanced copper.

first - to my knowledge we are not talking about 1/2 oz on one side and 1 oz
on the other side, which is does in fact cause uneven etching problems, but
that was not stated in the original post that I responded to, nd as far as I
know this is not the topic of this discussion.

secondly - we are not talking about the warpage issue which I specifically
excluded.

all that taken into consideration, given the proper circulation of the
etchant (which includes removal of the etched copper now in solution),
copper is copper, and etchant is etchant, and a specific etchant will remove
a specific thickness of copper in a given period of time, irrespective of
whether we are talking about a 1/4 sqiare inch area or a 10 square inch
area.

? ? ?

 However, they cannot compensate for variances in a different areas over
the
 same side. It is all a time issue, how long is the area of copper in the
 etchant, spray or otherwise, verses how much copper there is to etch off.

all other things considered, this is usually a thickness issue, and not an
area issue, unless you are talking about larve variances in thichness,
which I would call a process control or material problem.

 The more copper to remove, the more time required. Less copper to remove,
 less time.

again thickness', not area.

 Thus with unbalanced copper the shop has to define some median
 time to adequately remove all the copper to be etched without removing or
 undercutting other areas too badly.

as far as I know this only applies to boards or panels or layer pairs where
the copper weights are unbalanced from one side to another, and NOT to a
board or a panel or a layer pair where the weights are balanced, but there
is more copper to remove on one side or the other.

 Remember that these spray etchers are
 conveyorized, they can't sense areas of a board and speed up or slow down
 the conveyor. Let alone sense what is on the other side of the panel, what
 is on the other board within the panel but 16 inches away under the other
 etchant nozzles. Or how about the etch nozzles that swivel/sway back and
 forth, how would you vary them for differing areas of the board when they
 are sweeping large areas of a panel that is also moving. It is all a game
of
 averages, you average your Cu distribution, they average their etching,
you
 receive a good well-etched board.


again, I / we are NOT talking about different weights of copper on the
different sides, which leaves us with a simple area problem, and I don't
think that what you are saying is really applicable, given a proper rate of
etchant replenishment and removal.

 We tightly control our etching tolerances and undercut on almost all
 of our boards. So we go through this all  the time with big high tech
 fabricators and smaller low tech fabricators as well. Some of the biggest
 etching F-ups and the whining afterward, have come from big high tech
shops
 with very good reputations and the best etching equipment around. I have
had
 fabricators hedge their bets against being able to control their etching
to
 our requirements, until they can see our boards/panels. They are looking
for
 the even distribution of the Cu in order to meet the tight etching
 tolerances.


All of what you say above is true for any board in a general sense, except I
can not accept your trying to to apply it to different size areas of copper
where the thickness is the same, because it simply does not apply in
anything more than the most minor sense.

All of what you say does apply where you are etching a board / panel / layer
pair with different weights of copper on each side, but that is not what the
discussion was about.

JaMi

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Ian Wilson

On 02:05 PM 8/10/2002 -0700, JaMi Smith said:

what are you saying and meaning when you speak of unbalanced copper.

first - to my knowledge we are not talking about 1/2 oz on one side and 1 oz
on the other side, which is does in fact cause uneven etching problems, but
that was not stated in the original post that I responded to, nd as far as I
know this is not the topic of this discussion.

secondly - we are not talking about the warpage issue which I specifically
excluded.

all that taken into consideration, given the proper circulation of the
etchant (which includes removal of the etched copper now in solution),
copper is copper, and etchant is etchant, and a specific etchant will remove
a specific thickness of copper in a given period of time, irrespective of
whether we are talking about a 1/4 sqiare inch area or a 10 square inch
area.

Jami,

Chemistry is not one dimensional.  It takes longer to etch a few microns 
off a large area of copper than it does a small area.  Balanced copper as 
being discussed is a general even density across the design.  It has been a 
standard desire by almost all board houses I have spoken to over the last 
20 years that I have been doing boards.

We have a company in this country that does very high end work.  The do 
their etch on 2 micron copper plated boards (plasma plating is one of their 
first steps).  This very fine layer means very tight edge control and under 
etch etc (they will do 2 mil tracks as a special and padsless-vias I think).

I refer you to their capability page:
http://www.lintek.com.au/boa.htm

Note the text (Tolerance on track widths is +- 0.008mm or better depending 
on the design and uniformity of copper distribution.)

If you want to continue the discussion I suggest you make contact with a 
number of PCB makers and speak to their process engineers first.

Ian Wilson

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread JaMi Smith

Terry please see below

- Original Message -
From: Terry Harris [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 12:36 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 On Tue, 8 Oct 2002 11:18:07 -0700, you wrote:

 Some boardhouses may still dip or submerge the board into an etchant
 tank, where the board simply sits in the etchant, however, there should
be
 enough agitation or circulation of the etchant to prevent what they
are
 describing from happening.

 Nothing you can do will eliminate the problem, just hope to reduce the
 effects. A lot of copper in one area of the PCB will take longer to etch
 resulting in over etching (undercutting) in areas with less copper. The
 board house can't afford to over etch because some tracks will undercut
 unacceptably (or even completely and fall off the board), under etching
 risks leaving shorts in the dense areas. You are giving them process
 control and yield problems seems reasonable they want you to pay extra.


I can accept this as applies to a board with different weights of copper on
each side, but not for the same thickness of copper (specifically not to the
extent that you appear to be stating here), where the only issue is area,
and there is proper replensihment and removal of etchant.

(Please see my reply to Brad)

 Before the etching problem there is a similar problem with plating. Need
 100A for the copper on one side of the board and 5A for the other - how do
 you arrange that? I think the only thing they can do is fiddle around with
 anode spacing on each side of the board to try to balance it a bit. They
 can't plate at 100A anyway because it puts too much current through the
 sparse areas and leaves the tracks with an uneven 'frazzled' appearance.


Plating is an issue that IS related to surface area, and NOT what we are
talking about here, although it would be an somewhat applicable comparison
if in fact there was no agitation or circulation of the etchant, which
is what I was saying was a problem in the first place.

 Again you are giving them process control and yield problems and slowing
 them down.


Again, I will state that I believe that the original statement by the board
house, as stated in the post that I responded to, indicates a problem with
how the board house is dealing with the board (unless there are addional
factors that were not stated, such as uneven weights of copper on the
different sides of the board).

JaMi

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Brad Velander

Jami,

Unbalanced copper is exactly what the conversation started on,
uneven distribution of Cu and spaces or gaps across the surface or area of
the PCB. I am not talking different Cu thicknesses.

I am not trying to pick on you Jami, but I deal with numerous
fabricators on this very issue day in and day out. To achieve even and equal
etching one must have an even distribution of Cu and similar gaps or spaces
across a prescribed area. At least three others have answered your comments
with similar and like comments, nobody has stood up to defend your comments.
Seems like there is a consensus building.

I might add that you may think that your boards are being controlled
and monitored for undercut but unless you are testing or specifically
ordering tests (cross-sections) to be performed , then you are probably not
getting what you think you are getting.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com
Norsat's Microwave Products Division has now achieved ISO 9001:2000
certification 



 -Original Message-
 From: JaMi Smith [mailto:[EMAIL PROTECTED]]
 Sent: Tuesday, October 08, 2002 2:06 PM
 To: Protel EDA Forum
 Cc: JaMi Smith
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
 Brad see below . . .
 
 - Original Message -
 From: Brad Velander [EMAIL PROTECTED]
 To: 'Protel EDA Forum' [EMAIL PROTECTED]
 Sent: Tuesday, October 08, 2002 12:25 PM
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
  Jami,
  that's just blatantly not true! There is nothing questionable about
  a board house that directs you to issues of uneven etching 
 or plating
  because of varying Cu distribution. Not even with spray etchers.
 
  Spray etchers are generally better than tanks but they are not
  perfect either when it comes to unbalanced copper. Some of 
 the best fab
  houses using spray etchers will still point out unbalanced 
 etching because
  of unbalanced copper, even though they 'can' adjust the 
 spray rates and
  pressures to compensate at least side/side or one general 
 area to another.
 
 what are you saying and meaning when you speak of unbalanced copper.
 
 first - to my knowledge we are not talking about 1/2 oz on 
 one side and 1 oz
 on the other side, which is does in fact cause uneven etching 
 problems, but
 that was not stated in the original post that I responded to, 
 nd as far as I
 know this is not the topic of this discussion.
 
 secondly - we are not talking about the warpage issue which 
 I specifically
 excluded.
 
 all that taken into consideration, given the proper circulation of the
 etchant (which includes removal of the etched copper now in solution),
 copper is copper, and etchant is etchant, and a specific 
 etchant will remove
 a specific thickness of copper in a given period of time, 
 irrespective of
 whether we are talking about a 1/4 sqiare inch area or a 10 
 square inch
 area.
 
 ? ? ?
 
  However, they cannot compensate for variances in a 
 different areas over
 the
  same side. It is all a time issue, how long is the area of 
 copper in the
  etchant, spray or otherwise, verses how much copper there 
 is to etch off.
 
 all other things considered, this is usually a thickness 
 issue, and not an
 area issue, unless you are talking about larve variances 
 in thichness,
 which I would call a process control or material problem.
 
  The more copper to remove, the more time required. Less 
 copper to remove,
  less time.
 
 again thickness', not area.
 
  Thus with unbalanced copper the shop has to define some median
  time to adequately remove all the copper to be etched 
 without removing or
  undercutting other areas too badly.
 
 as far as I know this only applies to boards or panels or 
 layer pairs where
 the copper weights are unbalanced from one side to another, 
 and NOT to a
 board or a panel or a layer pair where the weights are 
 balanced, but there
 is more copper to remove on one side or the other.
 
  Remember that these spray etchers are
  conveyorized, they can't sense areas of a board and speed 
 up or slow down
  the conveyor. Let alone sense what is on the other side of 
 the panel, what
  is on the other board within the panel but 16 inches away 
 under the other
  etchant nozzles. Or how about the etch nozzles that 
 swivel/sway back and
  forth, how would you vary them for differing areas of the 
 board when they
  are sweeping large areas of a panel that is also moving. It 
 is all a game
 of
  averages, you average your Cu distribution, they average 
 their etching,
 you
  receive a good well-etched board.
 
 
 again, I / we are NOT talking about different weights of copper on the
 different sides, which leaves us with a simple area 
 problem, and I don't
 think that what you are saying is really applicable, given a 
 proper rate of
 etchant replenishment

Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Thomas

Sometimes that's just not possible though.
I've recently finished a double sided PCB with allot of controlled impedance
tracks on one side widely spaced to prevent xtalk and to prevent arcing (its
a surge protection device) with a solid ground plane on the other side.

My board house has not complained (yet).

Tom.

 -Original Message-
 From: Brad Velander [mailto:[EMAIL PROTECTED]]
 Sent: Wednesday, 9 October 2002 04:18
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
 Aj or others,
   same issue with plating. Differences in copper density 
 (over area)
 effect the plating rate of Cu to the circuit pattern. 
 Balanced copper side
 to side, area to area, is the fabricators best friend (yours 
 also in the
 end).
 
 Sincerely,
 Brad Velander.
 
 Lead PCB Designer
 Norsat International Inc.
 Microwave Products
 Tel   (604) 292-9089 (direct line)
 Fax  (604) 292-9010
 email: [EMAIL PROTECTED]
 http://www.norsat.com
 Norsat's Microwave Products Division has now achieved ISO 9001:2000
 certification 
 
 
 
  -Original Message-
  From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
  Sent: Tuesday, October 08, 2002 9:51 AM
  To: Protel EDA Forum
  Subject: Re: [PEDA] OT - Complex boards and time to Layout?
  
  
  Interesting, I thought that the copper balancing act was only for
  containing possible warpage. Makes sense, though. Thanks for tip.
  
  aj
  
   From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] 
  ...
   I did this type of pour and had the board house 
   slap my wrists ...The explanation was that if 
   you have a big pour with lots of copper on one 
   side you need about the same copper on the other
   side to balance it. Otherwise the acid on one side 
   gets weak while the other side remains strong, 
   resulting in overetching on one side or 
   under-etching on the other
 

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Max P. Henzi

Hi Thomas,

I agree with all of those who have indicated that it is desirable to
balance the copper density on both sides of the board.  In cases such as
you mention, the board manufacturer still has some options available.
Remember that the board manufacturer will take your data and step and
repeat it onto a panel.  In addition to your data, this panel also
includes venting or thieving patterns surrounding your data.  The
density of these patterns can be modified to compensate for an
unbalanced condition in your raw data.  In a case such as you mention,
the manufacturer could put a very dense venting pattern on the side of
the board having the widely spaced traces and a very sparse venting
pattern on the side containing the ground plane.  Additionally, if the
board is small enough (so that there are a lot of boards on the panel),
then some of them can be turned ground plane up and some can be turned
ground plane down, again helping to balance the copper.

Best regards,

Max P. Henzi
CEO, PentaLogix LLC
Tel.   (925) 952-3890
Fax.  (925) 934-6978
Email [EMAIL PROTECTED]
Web.  www.pentalogix.com
 
 

-Original Message-
From: Thomas [mailto:[EMAIL PROTECTED]] 
Sent: Tuesday, October 08, 2002 4:20 PM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] OT - Complex boards and time to Layout?

Sometimes that's just not possible though.
I've recently finished a double sided PCB with allot of controlled
impedance
tracks on one side widely spaced to prevent xtalk and to prevent arcing
(its
a surge protection device) with a solid ground plane on the other side.

My board house has not complained (yet).

Tom.

 -Original Message-
 From: Brad Velander [mailto:[EMAIL PROTECTED]]
 Sent: Wednesday, 9 October 2002 04:18
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
 Aj or others,
   same issue with plating. Differences in copper density 
 (over area)
 effect the plating rate of Cu to the circuit pattern. 
 Balanced copper side
 to side, area to area, is the fabricators best friend (yours 
 also in the
 end).
 
 Sincerely,
 Brad Velander.
 
 Lead PCB Designer
 Norsat International Inc.
 Microwave Products
 Tel   (604) 292-9089 (direct line)
 Fax  (604) 292-9010
 email: [EMAIL PROTECTED]
 http://www.norsat.com
 Norsat's Microwave Products Division has now achieved ISO 9001:2000
 certification 
 
 
 
  -Original Message-
  From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
  Sent: Tuesday, October 08, 2002 9:51 AM
  To: Protel EDA Forum
  Subject: Re: [PEDA] OT - Complex boards and time to Layout?
  
  
  Interesting, I thought that the copper balancing act was only for
  containing possible warpage. Makes sense, though. Thanks for tip.
  
  aj
  
   From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] 
  ...
   I did this type of pour and had the board house 
   slap my wrists ...The explanation was that if 
   you have a big pour with lots of copper on one 
   side you need about the same copper on the other
   side to balance it. Otherwise the acid on one side 
   gets weak while the other side remains strong, 
   resulting in overetching on one side or 
   under-etching on the other
 


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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Ian Wilson

On 10:19 AM 9/10/2002 +1100, Thomas said:
Sometimes that's just not possible though.
I've recently finished a double sided PCB with allot of controlled impedance
tracks on one side widely spaced to prevent xtalk and to prevent arcing (its
a surge protection device) with a solid ground plane on the other side.

My board house has not complained (yet).

Tom.

Even on such a board there are often things that can be done to help even 
copper distribution.  In areas widely spaced from the active tracks you can 
place copper balancing squares or even a hatched polygon.

When I fully specify a production panel (break offs, tooling strips etc) I 
will usually say the that the production tooling is uncontrolled space and 
the board house is free to add copper balancing features.  Some will, some 
won't.  Those that do usually add squares along the tooling strip.

I have not had a board house complain for years about unbalanced copper 
density, but I have had some thank me for making an effort to balance the 
copper.

Ian Wilson

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread JaMi Smith

Brad,

You've kind of lost me here, because while I know that this thread was
originally started back on 9/24, and has meandered around topicwise for a
while, the specific post that I responded to, is copied here for
clarification.

Interesting, I thought that the copper balancing act was only for
containing possible warpage. Makes sense, though. Thanks for tip.

aj

 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
...
 I did this type of pour and had the board house
 slap my wrists ...The explanation was that if
 you have a big pour with lots of copper on one
 side you need about the same copper on the other
 side to balance it. Otherwise the acid on one side
 gets weak while the other side remains strong,
 resulting in overetching on one side or
 under-etching on the other

This is when I entered the conversation, earlier today, and this last
paragraph is what I am commenting on.

Specifically, the sentance that begins Otherwise the acid . . .  is what I
am having trouble with.

I do admit in my initial reply that there are in fact reasons to balance
copper, but my problem is that I do not believe that this is one of them,
or certainly not a major one.

Please note that the we are simply talking copper removal given the above
parameters, and not talking about different weights (thicknessess) of copper
on different sides of the board, nor are we talking about warpage, but
simply about the last sentance of the above statement (beginning Otherwise
. . .).

This is why I asked you what you ment by unbalanced copper, because there
is absolutely nothing in the above statement to indicate different weights
or thicknesses.

Do all of your comments apply when you have different weights or
thicknesses? Of course.

Is designing a board with uneven distributions of copper or uneven
distributions of layers prone to warpage? Of course.

Once again, what do either of these issues have to do with what is discussed
in the above statement that I replied to?

Since I made my comment on the above statement, there have been three
replies that I am aware of, your original reply, a reply by Terry Harris,
and your followup reply which I am responding to here.

Maybe I am not getting all of the emails on this subject, but Terry hardly
constitutes three others.

I still say that if you limit your term of unbalanced copper stricly to
area, as indicated in the above statement, then I still say that the last
statement beginning Otherwise . . . indicates that there is a problem with
the board house, because with proper agitation and circulation there
will not be a problem that in anyway lives up tp the enormity that you guys
(you and Terry) are making of it. That does not mean  there is no difference
at all, but that just as I said, there is not a problem, and certainly not
a major problem.

Do board houses want you to have the minimum amount of copper removal on all
of your boards so that they can extend the life of their etchant? Sure, but
that does not mean that it they have to etch a lot away that it is a bad
design, does it? Of course not.

I would suggest that the only way that this would become a major problem,
would be if there were not enough replenishment of the etchant coupled with
removal of the etchant containing copper in solution.

To me, this problem speaks of there not being enough replenishment and
removal of the etchant as described above, and if your board house seems
to consider it a major problem, then maybe you should be asking the same
question of why as it relates to them. Are they simply dropping your
boards in a tank with out any agitation or circulation too?

Anyway, how does a spray system with a common collector and pump that
supplies the same etchant to all of the spray nozzels, end up with weak
acid on one side any how?

And please do feel free to pick on me when I need it, which I know I do from
time to time.

JaMi

- Original Message -
From: Brad Velander [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 3:38 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 Jami,

 Unbalanced copper is exactly what the conversation started on,
 uneven distribution of Cu and spaces or gaps across the surface or area of
 the PCB. I am not talking different Cu thicknesses.

 I am not trying to pick on you Jami, but I deal with numerous
 fabricators on this very issue day in and day out. To achieve even and
equal
 etching one must have an even distribution of Cu and similar gaps or
spaces
 across a prescribed area. At least three others have answered your
comments
 with similar and like comments, nobody has stood up to defend your
comments.
 Seems like there is a consensus building.

 I might add that you may think that your boards are being controlled
 and monitored for undercut but unless you are testing or specifically
 ordering tests (cross-sections) to be performed , then you are probably
not
 getting what you think you are getting.

 Sincerely

Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Terry Harris

On Tue, 8 Oct 2002 14:54:55 -0700, JaMi wrote:

 Nothing you can do will eliminate the problem, just hope to reduce the
 effects. A lot of copper in one area of the PCB will take longer to etch
 resulting in over etching (undercutting) in areas with less copper. The
 board house can't afford to over etch because some tracks will undercut
 unacceptably (or even completely and fall off the board), under etching
 risks leaving shorts in the dense areas. You are giving them process
 control and yield problems seems reasonable they want you to pay extra.

I can accept this as applies to a board with different weights of copper on
each side, but not for the same thickness of copper (specifically not to the
extent that you appear to be stating here), where the only issue is area,
and there is proper replensihment and removal of etchant.

The trouble is your idea of 'proper' isn't possible. If each molecule of
etchant came into contact with its own molecule sized area of the board and
was magically whisked away then copper density would make no difference but
that doesn't happen. 

It hits the board surface then moves around a bit. It reacts with the first
copper atom it meets and for the rest of its journey across the board
surface it is just getting in the way of the remaining active etchant
molecules. 

The more copper area on the board surface the higher the proportion of
spent etchant in contact with the board. You can not avoid this effect just
try to reduce it by reducing the time each etchant molecule stays on the
board surface (by spraying or agitation or bubbling or whatever).
Cheers, Terry.

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread JaMi Smith

Terry please see below,

- Original Message -
From: Terry Harris [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 6:43 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 On Tue, 8 Oct 2002 14:54:55 -0700, JaMi wrote:

  Nothing you can do will eliminate the problem, just hope to reduce the
  effects. A lot of copper in one area of the PCB will take longer to
etch
  resulting in over etching (undercutting) in areas with less copper. The
  board house can't afford to over etch because some tracks will undercut
  unacceptably (or even completely and fall off the board), under etching
  risks leaving shorts in the dense areas. You are giving them process
  control and yield problems seems reasonable they want you to pay extra.

 I can accept this as applies to a board with different weights of copper
on
 each side, but not for the same thickness of copper . . .


 * * * * * * * * * *(specifically not to the
  --
--

 * * * * * * * * * *extent that you appear
  --
--

 * * * * * * * * * *to be stating here),
  --
--

   . . .  where the only issue is area,
 and there is proper replensihment and removal of etchant.

 The trouble is your idea of 'proper' isn't possible. If each molecule of
 etchant came into contact with its own molecule sized area of the board
and
 was magically whisked away then copper density would make no difference
but
 that doesn't happen.


I am not saying there is no difference, I am saying that it is not a major
problem.

 It hits the board surface then moves around a bit. It reacts with the
first
 copper atom it meets and for the rest of its journey across the board
 surface it is just getting in the way of the remaining active etchant
 molecules.


granted, granted, granted, granted, but this is nowhere near the the
monumental problem that you guys are making it out to be.

 The more copper area on the board surface the higher the proportion of
 spent etchant in contact with the board. You can not avoid this effect
just
 try to reduce it by reducing the time each etchant molecule stays on the
 board surface (by spraying or agitation or bubbling or whatever).


granted, but this is NOT THE SAME as saying that the acid on this side of
the board is going to get weak, in the sense that we are talking about. The
specific statement I am replying to implies (unquestionably to me) that
there is NOT adaquate circulation  / agitation / replenishment of the
etchant, period.

I am not talking about molecular levels, I am talking about the difference
between dropping the board in a tank and letting it sit, which is directly
implied in the original post, and giving the board the proper agitation /
circulation of the etchant, and removal of copper in solution from the area
that it needs to etch properly.

I cannot see how proper circulation could possibly ever let the acid on one
side get weak, and I cannot accept that your description above qualifies as
letting the acid on one side get weak.

How many times do I have to say it, the problem you are discribing is minor
by comparison, to the problem as it appears to be described in the original
description in the post that I responded to.

Are you guys trying to say that the original post does not imply that there
is improper agitation / circulation / solution removal? None of you seem to
be saying that, but you are all telling me I am out to lunch because I am
saying that.

What you are talking about is a minor problem compared to what I am talking
about, and if the quote of what the board house said is anywhere near
accurate, I still say look for another board house.

Please remember that I agree that there are far more important reasons to
balance the copper (and the layer stackup) in a board than this, but I still
maintain that this is a minor problem in comparison to those issues, and the
issue of simply dropping a board in a tank of etchant and letting it sit so
that the acid on one side gets weak.

-

I have just logged onto Yahoo! Groups and I find that for some reason I have
not received all of the posts for this thread.

I have received all of Brads, and all of yours Terry, but I am missing
number 12425 from Ian (which I just forwarded and will now go read),
although I got a later one from Ian, and the same is true with Thomas
(missed his earlier post but got his later post), and I have not received
the post from Max. This is truely bizzare! They must be stuck in
SBCGlobal.net internet hell somewhere.

-

What I am saying, and what I have always said, is that the statement in the
original post implies no agitation / circulation / replenishment, and that
IS a MAJOR problem.

Do any of you guys actually dissagree with that?

JaMi

Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Brad Velander

 Thomas,
   your comments are too familiar. The problem is that your average PCB
designer/buyer has no manner to accurately check trace tolerance or
undercut. At best most may have access to something like a tooling
microscope which will only give you a top down approximation of track
tolerance. The shops know it and generally they will judge how realistic
your requirements are and second guess what they can get away with rather
than discussing it with the designer/buyer. I quite often will have new
shops quote the board, start fab and then call me to question the nature of
my requirements even though they were clearly spelled out form the start. In
a few rare cases shops have actually backed out of doing the job once they
found out I was serious about my tolerances. We still have some problems
from order to order with some long term shops.

Sincerely,
Brad Velander 

-Original Message-
From: Thomas
To: 'Protel EDA Forum'
Sent: 08/10/2002 5:29 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?

Ian, both your and Max's comments sound reasonable, I'll endeavour to
help
out my board house next time. I had thought about this problem before
(particularly with regards to 'undercut' over etching on one side), but
as
I'd never heard any complaints I assumed all was ok.

Tom.

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread JaMi Smith


Ian, please see below


 --- In [EMAIL PROTECTED], Ian Wilson
 [EMAIL PROTECTED] wrote:
 On 02:05 PM 8/10/2002 -0700, JaMi Smith said:

snip



 Chemistry is not one dimensional.

Agreed

  . . .  It takes longer to etch a few
 microns
 off a large area of copper than it does a small area.

Granted, but not monumentially as everyone would imply.

 . . . Balanced
 copper as
 being discussed is a general even density across the design.  It has
 been a
 standard desire by almost all board houses I have spoken to over the
 last
 20 years that I have been doing boards.


While I will agree that almost all board houses request a balanced copper
design, they almost unanomously do so for other reasons, and not this
reason. In over 35 years of doing boards I cannot remember ever having had
one board house bring up this issue in the context now being argued.

 We have a company in this country that does very high end work.  The
 do
 their etch on 2 micron copper plated boards (plasma plating is one of
 their
 first steps).  This very fine layer means very tight edge control and
 under
 etch etc (they will do 2 mil tracks as a special and padsless-vias I
 think).

When issues such as line width, edge control, undercut, etc., are important
in a design, they must be specifically specified, and then your board house
will get into working out the details with you, but in the absence of
specific stated requirements, nothing that we have discussed would go beyond
standard tolerancing issues, and create a problem of the magnatude that
everyone is implying.


 I refer you to their capability page:
 http://www.lintek.com.au/boa.htm

 Note the text (Tolerance on track widths is +- 0.008mm or better
 depending
 on the design and uniformity of copper distribution.)


Please note that they state uniformity of copper distribution, which in
most instances means the uniformity of copper thickness across the surface
of the board, which is at least as big a problem as the one that we are
discussing.

JaMi

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Brad Velander

 Jami,
   what the original post implies is that the fabricator had some issue with
being able to etch the board in a manner that met the specified
requirements. Those requirements have not been spelled out for us, nor do we
know the limitations or concerns of the fab shop. Therefore we are
discussing this topic theoretically which can tend to exagerate the
discussion.

  In short my comments would thank the fabricator for being honest and
showing integrity for whatever reason they felt that they couldn't fabricate
the board as is.

   There are all manner of fabricators out there, I know I have run into all
the types over the years. Some have tight controls, some have virtually no
controls. Some have plastic tubs of etchant, some have no aggitation, some
have bubbling to aggitate etchant, some move the boards through the etchant
and some use spray etchers of all descriptions, some have completely
automated lines. Some do your boards alone in the tank, some do 5 companies
boards at a time in the tank. Maybe that is where the problem lies but we
don't know for sure. We can just be thankful that this fabricator shows
minimal integrity in admitting that they felt they could not fab the board
as it was laid out. That is not a problem with the fabricators etching
methodology, it is a limitation that they acknowledge. A major asset in a
board shop in my opinion.

Sincerely,
Brad Velander.

-Original Message-
From: JaMi Smith
To: Protel EDA Forum
Cc: JaMi Smith
Sent: 08/10/2002 7:53 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?

snip
What I am saying, and what I have always said, is that the statement in
the
original post implies no agitation / circulation / replenishment, and
that
IS a MAJOR problem.

Do any of you guys actually dissagree with that?

JaMi

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread JaMi Smith

Just now this minute finally received Ians post supposedly sent at 2:44 PM
- only 6 hours and 15 minutes - and for this I pay 50 bucks a month!
JaMi
- Original Message - 
From: Ian Wilson [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 2:44 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Ian Wilson

On 08:26 PM 8/10/2002 -0700, JaMi Smith said:
 
  I refer you to their capability page:
  http://www.lintek.com.au/boa.htm
 
  Note the text (Tolerance on track widths is +- 0.008mm or better
  depending
  on the design and uniformity of copper distribution.)
 

Please note that they state uniformity of copper distribution, which in
most instances means the uniformity of copper thickness across the surface
of the board, which is at least as big a problem as the one that we are
discussing.

Rubbish - it means they can ensure better fine line quality and control 
when there is an even density of copper over the board.  Nothing to do with 
thickness.  I know these people well.  They do not make idle and confusing 
statements.  In the PCB manufacturing industry everyone knows what is meant 
by density and distribution.  You seem to be having some issues here with 
this, as well as having a tendency to wish be Last-Word-JaMi.

Over an out on this from me.  We should all have taken it to the OT list 
ages ago.  Getting silly now.

Ian

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Tony Karavidas

I see you're with SBC...Well there's another company having huge
problems. (another several thousand planned layoffs coming soon I
think.)

I can't belive I'm saying this, but I have been pretty darn happy with
my ATT cable modem service. I usually can't stand ATT.



 -Original Message-
 From: JaMi Smith [mailto:[EMAIL PROTECTED]] 
 Sent: Tuesday, October 08, 2002 9:05 PM
 To: Protel EDA Forum
 Cc: JaMi Smith
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
 Just now this minute finally received Ians post supposedly 
 sent at 2:44 PM
 - only 6 hours and 15 minutes - and for this I pay 50 bucks a 
 month! JaMi
 - Original Message - 
 From: Ian Wilson [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Tuesday, October 08, 2002 2:44 PM
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-10-08 Thread Thomas
Ian, both your and Max's comments sound reasonable, I'll endeavour to help
out my board house next time. I had thought about this problem before
(particularly with regards to 'undercut' over etching on one side), but as
I'd never heard any complaints I assumed all was ok.

Tom.

 -Original Message-
 From: Ian Wilson [mailto:i.wilson;considered.com.au]
 Sent: Wednesday, 9 October 2002 10:56
 To: Protel EDA Forum
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?
 
 
 On 10:19 AM 9/10/2002 +1100, Thomas said:
 Sometimes that's just not possible though.
 I've recently finished a double sided PCB with allot of 
 controlled impedance
 tracks on one side widely spaced to prevent xtalk and to 
 prevent arcing (its
 a surge protection device) with a solid ground plane on the 
 other side.
 
 My board house has not complained (yet).
 
 Tom.
 
 Even on such a board there are often things that can be done 
 to help even 
 copper distribution.  In areas widely spaced from the active 
 tracks you can 
 place copper balancing squares or even a hatched polygon.
 
 When I fully specify a production panel (break offs, tooling 
 strips etc) I 
 will usually say the that the production tooling is 
 uncontrolled space and 
 the board house is free to add copper balancing features.  
 Some will, some 
 won't.  Those that do usually add squares along the tooling strip.
 
 I have not had a board house complain for years about 
 unbalanced copper 
 density, but I have had some thank me for making an effort to 
 balance the 
 copper.
 
 Ian Wilson
 

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-30 Thread rlamoreaux

 they were meatball 10/10 mostly 12/12 bds
 there was a giant pour on the entire top
 the clearance on the pour was 20 mils all the way around the pads (to
 make it easy and not get shorts!)
 
 they said with a big plane it is harder to etch
 
 there must be at least a bit of truth to that because i have had this 
 trouble with this type of board from 3 different shops - albeit not the
 highest tech shops kicking around

I did this type of pour and had the board house slap my wrists and tell me 
because of it they would have to electrically test the boards even though 
they were very simple. 

The explainattion was that if you have a big pour with lots of copper on 
one side you need about the same copper on the other side to balance it. 
Otherwise the acid on one side gets weak while the other side remains 
strong, resulting in overetching on one side or underetching on the other. 
Better circulation in the acid bath helps, but yield still goes down and 
thus cost goes up.

If you do a big pour on only one side you should do it with a crosshatch 
pattern so that the copper is balanced and etching is even.

After that wrist slapping I've have learned my lesson and I try hard to 
keep the copper even.


Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-

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Re: [PEDA] OT - Complex boards and time to Layout? - Shorted Planes

2002-09-27 Thread Jon Elson

[EMAIL PROTECTED] wrote:

 Run a couple of amps (from a current limited power supply) through the short and
 use a 5 1/2 digit voltmeter on the millivolt range  and you can get the short
 circuit location fairly easily.

Yes, that's the procedure.  But, with perhaps 500 holes tied to the ground
plane, covering the whole board, the voltage drop across the planes can be REAL
small.  I ran 6.5 A between the power plane and ground, and was able to apply
about 15-20 mV between the planes.  The actual location of the short was
found at a through hole with about 2 mV difference than the neighbors.
But, there was probably 5 mV of voltage drop across the planes.  So, it had
to be compared to local pads that weren't shorted to spot the bad one.

Then, I had to burrow into the board, through 2 layers, to dig out the short
right next to a grounded pad.

Jon


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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-26 Thread Jon Elson

Danny Bishop wrote:

 funnily enough it never happened to me, I have never found a fault on my
 boards, and hence don't concern myself too much with the tests on basic
 double sided.

I've hardly ever had a problem on 2-sided, and they are easy to spot
visually
and fix in a moment.  But, major trouble deep inside a 6-layer board will
drive you nuts!  Locating the exact point where two split planes or two
power planes are shorted is a real bear!

Jon

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-26 Thread Jon Elson

Dennis Saputelli wrote:

 they said with a big plane it is harder to etch

 there must be at least a bit of truth to that because i have had this
 trouble with this type of board from 3 different shops - albeit not the
 highest tech shops kicking around

 the board was pretty long, about 15 inches, that may or may not be a
 factor

Boards with large density variations can cause a problem.  A single
gap in a large plane of copper is usally etched first, and large areas
of non-copper will locally deplete the etchant, preventing full etching
in that area.

Conversely, for plating, where most of the trace definition is done in the SMOBC
process, the large areas of copper may deplete the copper bath, and leave the
plating thinner there.

Anyway, modern process gear is a lot more tolerant of this sort of
variation, as the boards we design drive the industry to develop equipment
that can handle it without stressing the process to where it becomes
unreliable.

Jon

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Re: [PEDA] OT - Complex boards and time to Layout? - Shorted Planes

2002-09-26 Thread Clive . Broome



Run a couple of amps (from a current limited power supply) through the short and
use a 5 1/2 digit voltmeter on the millivolt range  and you can get the short
circuit location fairly easily.




Jon Elson [EMAIL PROTECTED] on 27/09/2002 07:43:21 AM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Clive Broome/sdc)

Subject:  Re: [PEDA] OT - Complex boards and time to Layout?



Danny Bishop wrote:

 funnily enough it never happened to me, I have never found a fault on my
 boards, and hence don't concern myself too much with the tests on basic
 double sided.

I've hardly ever had a problem on 2-sided, and they are easy to spot
visually
and fix in a moment.  But, major trouble deep inside a 6-layer board will
drive you nuts!  Locating the exact point where two split planes or two
power planes are shorted is a real bear!

Jon






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Re: [PEDA] OT - Complex boards and time to Layout? - Shorted Planes

2002-09-26 Thread Harry Selfridge

There is also an inexpensive instrument ( about $180US ) called Leak 
Seeker from Electronic Design Specialists ( www.eds-inc.com ) that does a 
very respectable job of finding the location of internal board shorts.  It 
takes a little practice to get the most out of it, but it does work.

Polar Instruments ( www.polarinstruments.com ) also makes a similar 
instrument called ToneOhm, but it is on the 'pricey' side.



At 10:45 AM 9/27/02 +1000, you wrote:


Run a couple of amps (from a current limited power supply) through the 
short and
use a 5 1/2 digit voltmeter on the millivolt range  and you can get the short
circuit location fairly easily.




Jon Elson [EMAIL PROTECTED] on 27/09/2002 07:43:21 AM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Clive Broome/sdc)

Subject:  Re: [PEDA] OT - Complex boards and time to Layout?



Danny Bishop wrote:

  funnily enough it never happened to me, I have never found a fault on my
  boards, and hence don't concern myself too much with the tests on basic
  double sided.

I've hardly ever had a problem on 2-sided, and they are easy to spot
visually
and fix in a moment.  But, major trouble deep inside a 6-layer board will
drive you nuts!  Locating the exact point where two split planes or two
power planes are shorted is a real bear!

Jon
snip

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Ian Middleton

Try http://www.dunneroberts.co.uk/allsites/gallery/big.htm for a monster
Protel board.

Or http://www.dunneroberts.co.uk for home page.



 -Original Message-
 From: Phillip Stevens [mailto:[EMAIL PROTECTED]]
 Sent: 25 September 2002 02:58
 To: Protel EDA Forum
 Subject: [PEDA] OT - Complex boards and time to Layout?



 Someone asked me the other day how long it would take to layout a
 reasonably large and somewhat complex design.  I gave them what I
 thought was my best guess (a month).

 So, now I'm curious.  What's the biggest,  baddest PCB you've ever
 created,  and how long did (just) the layout take for it?

 Assume you had been handed:
 - The schematic and a netlist.
 - The footprints for all the parts.
 - An already dimensioned PCB outline template to use.

 Also curious if there are any URL's that might have viewable
 examples of complex boards with completion statistics.

 This maybe a bit OT for this list,  feel free to e-mail me directly,
 unless anyone else seems to be curious.

 ---Phil


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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Robert M. Wolfe

Phil,
A month is most likely about right for most of these type
of complex boards, but only if there are not
constant changes made or the fact that key info
needed to do the layout has properly been
available. Not just libraries and an outline need to be there. But I have
seen that month grow
by a couple weeks easily because of this kind
of stuff.

Unless your bidding an absolute drop dead complete date
a month later, than you just have to work 30 hours each day.
Bob Wolfe
- Original Message -
From: Phillip Stevens [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, September 24, 2002 9:57 PM
Subject: [PEDA] OT - Complex boards and time to Layout?



 Someone asked me the other day how long it would take to layout a
 reasonably large and somewhat complex design.  I gave them what I
 thought was my best guess (a month).

 So, now I'm curious.  What's the biggest,  baddest PCB you've ever
 created,  and how long did (just) the layout take for it?

 Assume you had been handed:
 - The schematic and a netlist.
 - The footprints for all the parts.
 - An already dimensioned PCB outline template to use.

 Also curious if there are any URL's that might have viewable
 examples of complex boards with completion statistics.

 This maybe a bit OT for this list,  feel free to e-mail me directly,
 unless anyone else seems to be curious.

 ---Phil




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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Bagotronix Tech Support

I get the broken graphic placeholder for those images.

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com


- Original Message - 
From: Ian Middleton [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, September 25, 2002 11:05 AM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 Try http://www.dunneroberts.co.uk/allsites/gallery/big.htm for a monster
 Protel board.
 
 Or http://www.dunneroberts.co.uk for home page.


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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Matt Daggett

Hmm... no images on that page

-Original Message-
From: Ian Middleton [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, September 25, 2002 11:05 AM
To: Protel EDA Forum
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


Try http://www.dunneroberts.co.uk/allsites/gallery/big.htm for a monster
Protel board.

Or http://www.dunneroberts.co.uk for home page.



 -Original Message-
 From: Phillip Stevens [mailto:[EMAIL PROTECTED]]
 Sent: 25 September 2002 02:58
 To: Protel EDA Forum
 Subject: [PEDA] OT - Complex boards and time to Layout?



 Someone asked me the other day how long it would take to layout a
 reasonably large and somewhat complex design.  I gave them what I
 thought was my best guess (a month).

 So, now I'm curious.  What's the biggest,  baddest PCB you've ever
 created,  and how long did (just) the layout take for it?

 Assume you had been handed:
 - The schematic and a netlist.
 - The footprints for all the parts.
 - An already dimensioned PCB outline template to use.

 Also curious if there are any URL's that might have viewable
 examples of complex boards with completion statistics.

 This maybe a bit OT for this list,  feel free to e-mail me directly,
 unless anyone else seems to be curious.

 ---Phil


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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Tim Exley

Try  http://www.dunneroberts.co.uk/allsites/gallery/images/big-top.jpg
and  http://www.dunneroberts.co.uk/allsites/gallery/images/big-bot.jpg

Tim Exley

-Original Message-
From: Ian Middleton [mailto:[EMAIL PROTECTED]]
Sent: Thursday, 26 September 2002 3:05 a.m.
To: Protel EDA Forum
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


Try http://www.dunneroberts.co.uk/allsites/gallery/big.htm for a monster
Protel board.

Or http://www.dunneroberts.co.uk for home page.



 -Original Message-
 From: Phillip Stevens [mailto:[EMAIL PROTECTED]]
 Sent: 25 September 2002 02:58
 To: Protel EDA Forum
 Subject: [PEDA] OT - Complex boards and time to Layout?



 Someone asked me the other day how long it would take to layout a
 reasonably large and somewhat complex design.  I gave them what I
 thought was my best guess (a month).

 So, now I'm curious.  What's the biggest,  baddest PCB you've ever
 created,  and how long did (just) the layout take for it?

 Assume you had been handed:
 - The schematic and a netlist.
 - The footprints for all the parts.
 - An already dimensioned PCB outline template to use.

 Also curious if there are any URL's that might have viewable
 examples of complex boards with completion statistics.

 This maybe a bit OT for this list,  feel free to e-mail me directly,
 unless anyone else seems to be curious.

 ---Phil


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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Bagotronix Tech Support

Wow!  I'm amazed that boards like that can be produced with any yield
greater than zero.  And that's just for the PCB.  How about the part
population process?  There's gotta be at least one or two pin shorts or
opens coming off the assembly line on a board that complex!

With a board that complex, your board vendor had better actually be doing
electrical test, instead of just charging for it and not doing it...

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Jon Elson

Tim Exley wrote:

 Try  http://www.dunneroberts.co.uk/allsites/gallery/images/big-top.jpg
 and  http://www.dunneroberts.co.uk/allsites/gallery/images/big-bot.jpg

WOW!  I'm glad I didn't have to design (or pay for) that one!  Vast numbers

of big quad flat packs on BOTH sides!

Jon

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Jon Elson

Bagotronix Tech Support wrote:

 With a board that complex, your board vendor had better actually be doing
 electrical test, instead of just charging for it and not doing it...

What?  This is endemic in the industry?  I've had to can several vendors
for pulling this stunt.  But, when they get caught by me, with my (in
comparison) quite modest boards, there's no doubt what is going on, because
the boards come back with 50% failure rate.  IE. 50% of the boards have at
least
one internal short or open.  I usually get the test report from Advanced
Circuits,
so I know what their yield is on multilayer boards.  And, it is somewhere
between
50 and 75% on most runs.  The 2-sided usually come back at 90% or better
passing.

So, it is real hard for me to believe that many fabricators pull these
stunts of
pretending to do electrical test as a routine matter.  I think they'd get
caught
WAY too often.

Jon

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Dennis Saputelli

it has happened to me twice
2 different shops
they charged for test setup, testing, but there were short all over some
of them and they were only double sided

Dennis Saputelli

Jon Elson wrote:
 
 Bagotronix Tech Support wrote:
 
  With a board that complex, your board vendor had better actually be doing
  electrical test, instead of just charging for it and not doing it...
 
 What?  This is endemic in the industry?  I've had to can several vendors
 for pulling this stunt.  But, when they get caught by me, with my (in
 comparison) quite modest boards, there's no doubt what is going on, because
 the boards come back with 50% failure rate.  IE. 50% of the boards have at
 least
 one internal short or open.  I usually get the test report from Advanced
 Circuits,
 so I know what their yield is on multilayer boards.  And, it is somewhere
 between
 50 and 75% on most runs.  The 2-sided usually come back at 90% or better
 passing.
 
 So, it is real hard for me to believe that many fabricators pull these
 stunts of
 pretending to do electrical test as a routine matter.  I think they'd get
 caught
 WAY too often.
 
 Jon

-- 
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street  
  fax: 415-647-3003San Francisco, CA 94110

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Danny Bishop

funnily enough it never happened to me, I have never found a fault on my
boards, and hence don't concern myself too much with the tests on basic
double sided.

 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, 26 September 2002 9:54 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?


 it has happened to me twice
 2 different shops
 they charged for test setup, testing, but there were short
 all over some
 of them and they were only double sided

 Dennis Saputelli

 Jon Elson wrote:
 
  Bagotronix Tech Support wrote:
 
   With a board that complex, your board vendor had better
 actually be doing
   electrical test, instead of just charging for it and not
 doing it...
 
  What?  This is endemic in the industry?  I've had to can
 several vendors
  for pulling this stunt.  But, when they get caught by me,
 with my (in
  comparison) quite modest boards, there's no doubt what is
 going on, because
  the boards come back with 50% failure rate.  IE. 50% of the
 boards have at
  least
  one internal short or open.  I usually get the test report
 from Advanced
  Circuits,
  so I know what their yield is on multilayer boards.  And,
 it is somewhere
  between
  50 and 75% on most runs.  The 2-sided usually come back at
 90% or better
  passing.
 
  So, it is real hard for me to believe that many fabricators
 pull these
  stunts of
  pretending to do electrical test as a routine matter.  I
 think they'd get
  caught
  WAY too often.
 
  Jon

 --
 __
 _
 www.integratedcontrolsinc.comIntegrated Controls, Inc.
tel: 415-647-04802851 21st Street
   fax: 415-647-3003San Francisco, CA 94110


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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-25 Thread Tim Hutcheson

Thanks, Dennis.  W/o naming names of the 'bad' guys, whose the good guy?

Sincerely,

Tim Hutcheson

There are 10 kinds of people in the world;
those that can read binary and those that can't.
-- Anonymous

-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, September 25, 2002 7:42 PM
To: Protel EDA Forum
Subject: Re: [PEDA] OT - Complex boards and time to Layout?


no, it was worse than that (easier bds)

they were meatball 10/10 mostly 12/12 bds
there was a giant pour on the entire top
the clearance on the pour was 20 mils all the way around the pads (to
make it easy and not get shorts!)

they said with a big plane it is harder to etch

there must be at least a bit of truth to that because i have had this
trouble with this type of board from 3 different shops - albeit not the
highest tech shops kicking around

the board was pretty long, about 15 inches, that may or may not be a
factor

once i got the right shop and ACTUAL testing, all the problems vanished
now we just turn em on and ship em

what a difference between that and chasing microscopic slivers to ground
at random points!

i don't want to name names because as they say 'sh*t happens' - i just
don't go there anymore

Dennis Saputelli


Tim Hutcheson wrote:

 What were the track and gap specs on these boards?  Are they consistently
 having trouble only on the 7/8 boards, or what?

 Sincerely,

 Tim Hutcheson
 
 There are 10 kinds of people in the world;
 those that can read binary and those that can't.
 -- Anonymous

 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
 Sent: Wednesday, September 25, 2002 6:54 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] OT - Complex boards and time to Layout?

 it has happened to me twice
 2 different shops
 they charged for test setup, testing, but there were short all over some
 of them and they were only double sided

 Dennis Saputelli

 Jon Elson wrote:
 
  Bagotronix Tech Support wrote:
 
   With a board that complex, your board vendor had better actually be
 doing
   electrical test, instead of just charging for it and not doing it...
 
  What?  This is endemic in the industry?  I've had to can several vendors
  for pulling this stunt.  But, when they get caught by me, with my (in
  comparison) quite modest boards, there's no doubt what is going on,
 because
  the boards come back with 50% failure rate.  IE. 50% of the boards have
at
  least
  one internal short or open.  I usually get the test report from Advanced
  Circuits,
  so I know what their yield is on multilayer boards.  And, it is
somewhere
  between
  50 and 75% on most runs.  The 2-sided usually come back at 90% or better
  passing.
 
  So, it is real hard for me to believe that many fabricators pull these
  stunts of
  pretending to do electrical test as a routine matter.  I think they'd
get
  caught
  WAY too often.
 
  Jon

 --

--
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street
  fax: 415-647-3003San Francisco, CA 94110

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