value. I had to make a separate symbol for pull up
and one for pull down placement.
-Original Message-
From: Ian Wilson [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, February 06, 2002 2:44 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Setting component clearance rules
On 01:52 PM 6/02/2002
At 02:00 PM 2/6/2002 +1100, Ian Wilson wrote:
Negative clearances on components do not work - would be nice if they
did. Alternatively a rule that allowed component clearance violations to
be ignored for specific components or regions would be helpful.
Here is what we should have. There
On 01:52 PM 6/02/2002 -0500, Abd ul-Rahman Lomax said:
At 02:00 PM 2/6/2002 +1100, Ian Wilson wrote:
Negative clearances on components do not work - would be nice if they
did. Alternatively a rule that allowed component clearance violations to
be ignored for specific components or regions
At 06:43 AM 2/7/2002 +1100, Ian Wilson wrote:
But then why stop there - the design rules should allow us to check that
the component fitting under the one with some off-pcb space is not too
high. I may be able to fit an 0805 under a ROM socket possibly even an S0
in some parts but not a fat
the solution i have found to work best is to not use component clearance
rules
Dennis Saputelli
Pat Lyons wrote:
I am trying to set component clearance rules to allow small
components to overlap the bounding box of larger components
or oddly shaped components. As an example allowing surface
At 07:53 PM 5/02/02 -0600, you wrote:
I am trying to set component clearance rules to allow small
components to overlap the bounding box of larger components
or oddly shaped components. As an example allowing surface
mount filter caps to sit tightly against the pins of a TO-220.
Setting negative
