At 01:11 PM 1/15/2004, Leo Potjewijd wrote:
Help!
It may just be my memory playing tricks (already pulled over 40 hours this
week), but I thought that the annular ring design rules used the same math
(i.e. the difference between the radii) for both pads and vias.
Some of the Protel documentation and in-program labelling has been
incorrect in the past; but it is traditional that annular ring refers to
the width of the ring, so a 10 mil annular ring would mean a diameteric
difference of 20 mils. The bad on-screen explanation -- and the actual
calculations? -- were corrected not long ago, it might even have been the
SE release, I forget.
During rework of a project that should have been at the fabhouse last
week, I noticed a difference between the calculation of a pad and a via:
pads still do the right math but vias are calculated by diameter in stead
of radius resulting in errors of -50% / +100% Both are pretty
undesirable, to say the least.
This same error is made in both the online and batch DRC and even in the
PCB reports.
I just made a test PCB and the annular ring rules functioned properly,
i.e., they reported radial difference. They did this for both pads and
vias. I had separate rules for pads and vias.
When I set the scope to 'whole board' and hit 'select affected objects'
_all_ copper gets highlighted wether it has a hole or not. Looks weird but
relatively harmless.
Well, not suprising. The annular ring rule applies to pads and vias. If
they don't have a hole, the annular ring is simply the radius of the
pad The programming was simpler that exempting zero-hole pads, but I do
wonder if a pad with no hole that violated the annular ring rule (i.e., the
radius was smaller than the rule value) would create a violation. So I
tried it. It doesn't. So the rule applies to the pad, but if the hole size
is zero, the DRC exempts it from violation.
I already tried the DDB repair service (no luck), restarted the PC (no
luck) and experimented on a fresh PCB (in the same DDB, true); only to
find the same weird stuff.
Is this just me being stupid (again)
Probably. :-) Join the crowd. I won't bore you with all the stupid things
I've done in the past day
or did some stray cosmic ray toggle a setting somewhere deep inside the
works of my P99SE? More importantly: _which_ setting?
I think you're going to need to look again, and I suggest documenting, in a
mail to us, *exactly* what is in each rule and exactly what primitives you
have -- try it with a small test board, it only really needs a couple of
vias and pads -- and exactly what report you get, copy and paste the
important parts into your mail.
My guess is that before you are done, you'll be slapping your head
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